diff options
| author | balrog <balrog@c046a42c-6fe2-441c-8c8c-71466251a162> | 2008-09-25 18:16:18 +0000 |
|---|---|---|
| committer | balrog <balrog@c046a42c-6fe2-441c-8c8c-71466251a162> | 2008-09-25 18:16:18 +0000 |
| commit | 2436b61a6b386d712a1813b036921443bd1c5c39 (patch) | |
| tree | 9a4250e083f45b100f741e007f8f02301cbdbcdc /target-i386/cpu.h | |
| parent | e737b32a3688d415c3b1f9d0a3fb2b941b1e758c (diff) | |
| download | qemu-2436b61a6b386d712a1813b036921443bd1c5c39.tar.gz | |
SYSENTER/SYSEXIT IA-32e implementation (Alexander Graf).
On Intel CPUs, sysenter and sysexit are valid in 64-bit mode. This patch
makes both 64-bit aware and enables them for Intel CPUs.
Add cpu save/load for 64-bit wide sysenter variables.
Signed-off-by: Alexander Graf <agraf@suse.de>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5318 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-i386/cpu.h')
| -rw-r--r-- | target-i386/cpu.h | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/target-i386/cpu.h b/target-i386/cpu.h index d1deda7197..7faf7068a3 100644 --- a/target-i386/cpu.h +++ b/target-i386/cpu.h @@ -549,8 +549,8 @@ typedef struct CPUX86State { /* sysenter registers */ uint32_t sysenter_cs; - uint32_t sysenter_esp; - uint32_t sysenter_eip; + target_ulong sysenter_esp; + target_ulong sysenter_eip; uint64_t efer; uint64_t star; @@ -737,7 +737,7 @@ static inline int cpu_get_time_fast(void) #define cpu_signal_handler cpu_x86_signal_handler #define cpu_list x86_cpu_list -#define CPU_SAVE_VERSION 6 +#define CPU_SAVE_VERSION 7 /* MMU modes definitions */ #define MMU_MODE0_SUFFIX _kernel |