Merge branch 'eflags3' of git://github.com/rth7680/qemu

* 'eflags3' of git://github.com/rth7680/qemu: (61 commits)
  target-i386: Use movcond to implement shiftd.
  target-i386: Discard CC_OP computation in set_cc_op also
  target-i386: Use movcond to implement rotate flags.
  target-i386: Use movcond to implement shift flags.
  target-i386: Add CC_OP_CLR
  target-i386: Implement tzcnt and fix lzcnt
  target-i386: Use clz/ctz for bsf/bsr helpers
  target-i386: Implement ADX extension
  target-i386: Implement RORX
  target-i386: Implement SHLX, SARX, SHRX
  target-i386: Implement PDEP, PEXT
  target-i386: Implement MULX
  target-i386: Implement BZHI
  target-i386: Implement BLSR, BLSMSK, BLSI
  target-i386: Implement BEXTR
  target-i386: Implement ANDN
  target-i386: Implement MOVBE
  target-i386: Decode the VEX prefixes
  target-i386: Tidy prefix parsing
  target-i386: Use CC_SRC2 for ADC and SBB
  ...

1 files changed, 19 insertions, 7 deletions

diff --git a/target-i386/cpu.h b/target-i386/cpu.h
index 7577e4f8bb..493dda8bb6 100644
--- a/target-i386/cpu.h
+++ b/target-i386/cpu.h
@@ -582,7 +582,7 @@ typedef uint32_t FeatureWordArray[FEATURE_WORDS];
 #define CPU_INTERRUPT_TPR       CPU_INTERRUPT_TGT_INT_3
 
 
-enum {
+typedef enum {
     CC_OP_DYNAMIC, /* must use dynamic code to get cc_op */
     CC_OP_EFLAGS,  /* all cc are explicitly computed, CC_SRC = flags */
 
@@ -636,8 +636,19 @@ enum {
     CC_OP_SARL,
     CC_OP_SARQ,
 
+    CC_OP_BMILGB, /* Z,S via CC_DST, C = SRC==0; O=0; P,A undefined */
+    CC_OP_BMILGW,
+    CC_OP_BMILGL,
+    CC_OP_BMILGQ,
+
+    CC_OP_ADCX, /* CC_DST = C, CC_SRC = rest.  */
+    CC_OP_ADOX, /* CC_DST = O, CC_SRC = rest.  */
+    CC_OP_ADCOX, /* CC_DST = C, CC_SRC2 = O, CC_SRC = rest.  */
+
+    CC_OP_CLR, /* Z set, all other flags clear.  */
+
     CC_OP_NB,
-};
+} CCOp;
 
 typedef struct SegmentCache {
     uint32_t selector;
@@ -725,8 +736,9 @@ typedef struct CPUX86State {
                         stored elsewhere */
 
     /* emulator internal eflags handling */
-    target_ulong cc_src;
     target_ulong cc_dst;
+    target_ulong cc_src;
+    target_ulong cc_src2;
     uint32_t cc_op;
     int32_t df; /* D flag : 1 if D = 0, -1 if D = 1 */
     uint32_t hflags; /* TB flags, see HF_xxx constants. These flags
@@ -764,7 +776,6 @@ typedef struct CPUX86State {
     XMMReg xmm_regs[CPU_NB_REGS];
     XMMReg xmm_t0;
     MMXReg mmx_t0;
-    target_ulong cc_tmp; /* temporary for rcr/rcl */
 
     /* sysenter registers */
     uint32_t sysenter_cs;
@@ -1117,9 +1128,10 @@ static inline int cpu_mmu_index (CPUX86State *env)
 #define EIP (env->eip)
 #define DF  (env->df)
 
-#define CC_SRC (env->cc_src)
-#define CC_DST (env->cc_dst)
-#define CC_OP  (env->cc_op)
+#define CC_DST  (env->cc_dst)
+#define CC_SRC  (env->cc_src)
+#define CC_SRC2 (env->cc_src2)
+#define CC_OP   (env->cc_op)
 
 /* n must be a constant to be efficient */
 static inline target_long lshift(target_long x, int n)