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authorChen Fan <chen.fan.fnst@cn.fujitsu.com>2013-12-23 17:04:02 +0800
committerAndreas Färber <afaerber@suse.de>2013-12-23 16:30:40 +0100
commit02e51483341a371b508c1a529782d83064c93596 (patch)
treea6f1621cf820f02bb122cf8990293ec9f5689065 /target-i386/misc_helper.c
parenteb2535f411c2201cd6f79e8d2b4e3f4c5b765729 (diff)
downloadqemu-02e51483341a371b508c1a529782d83064c93596.tar.gz
target-i386: Move apic_state field from CPUX86State to X86CPU
This motion is preparing for refactoring vCPU APIC subsequently. Signed-off-by: Chen Fan <chen.fan.fnst@cn.fujitsu.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
Diffstat (limited to 'target-i386/misc_helper.c')
-rw-r--r--target-i386/misc_helper.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/target-i386/misc_helper.c b/target-i386/misc_helper.c
index b6307ca386..47f6a2f7c1 100644
--- a/target-i386/misc_helper.c
+++ b/target-i386/misc_helper.c
@@ -155,7 +155,7 @@ target_ulong helper_read_crN(CPUX86State *env, int reg)
break;
case 8:
if (!(env->hflags2 & HF2_VINTR_MASK)) {
- val = cpu_get_apic_tpr(env->apic_state);
+ val = cpu_get_apic_tpr(x86_env_get_cpu(env)->apic_state);
} else {
val = env->v_tpr;
}
@@ -179,7 +179,7 @@ void helper_write_crN(CPUX86State *env, int reg, target_ulong t0)
break;
case 8:
if (!(env->hflags2 & HF2_VINTR_MASK)) {
- cpu_set_apic_tpr(env->apic_state, t0);
+ cpu_set_apic_tpr(x86_env_get_cpu(env)->apic_state, t0);
}
env->v_tpr = t0 & 0x0f;
break;
@@ -286,7 +286,7 @@ void helper_wrmsr(CPUX86State *env)
env->sysenter_eip = val;
break;
case MSR_IA32_APICBASE:
- cpu_set_apic_base(env->apic_state, val);
+ cpu_set_apic_base(x86_env_get_cpu(env)->apic_state, val);
break;
case MSR_EFER:
{
@@ -437,7 +437,7 @@ void helper_rdmsr(CPUX86State *env)
val = env->sysenter_eip;
break;
case MSR_IA32_APICBASE:
- val = cpu_get_apic_base(env->apic_state);
+ val = cpu_get_apic_base(x86_env_get_cpu(env)->apic_state);
break;
case MSR_EFER:
val = env->efer;