diff options
| author | bellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162> | 2008-06-04 13:53:05 +0000 |
|---|---|---|
| committer | bellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162> | 2008-06-04 13:53:05 +0000 |
| commit | 914178d34b08a1bc9b274ea97d332cf4d16f4009 (patch) | |
| tree | c0476a3a71b520f8fa567a1fb2ee6401238df53a /target-i386/translate.c | |
| parent | 5efc27bbb695017a7386cb9acef247b9dd29f2b6 (diff) | |
| download | qemu-914178d34b08a1bc9b274ea97d332cf4d16f4009.tar.gz | |
32 bit SVM fixes - INVLPG and INVLPGA updates
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4660 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-i386/translate.c')
| -rw-r--r-- | target-i386/translate.c | 12 |
1 files changed, 8 insertions, 4 deletions
diff --git a/target-i386/translate.c b/target-i386/translate.c index ba6284f760..40a85f8111 100644 --- a/target-i386/translate.c +++ b/target-i386/translate.c @@ -6569,7 +6569,8 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base); break; } else { - tcg_gen_helper_0_0(helper_vmrun); + tcg_gen_helper_0_1(helper_vmrun, + tcg_const_i32(s->aflag)); s->cc_op = CC_OP_EFLAGS; gen_eob(s); } @@ -6586,7 +6587,8 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base); break; } else { - tcg_gen_helper_0_0(helper_vmload); + tcg_gen_helper_0_1(helper_vmload, + tcg_const_i32(s->aflag)); } break; case 3: /* VMSAVE */ @@ -6596,7 +6598,8 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base); break; } else { - tcg_gen_helper_0_0(helper_vmsave); + tcg_gen_helper_0_1(helper_vmsave, + tcg_const_i32(s->aflag)); } break; case 4: /* STGI */ @@ -6635,7 +6638,8 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base); break; } else { - tcg_gen_helper_0_0(helper_invlpga); + tcg_gen_helper_0_1(helper_invlpga, + tcg_const_i32(s->aflag)); } break; default: |