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authorRichard Henderson <rth@twiddle.net>2013-11-02 09:22:04 -1000
committerRichard Henderson <rth@twiddle.net>2014-01-07 11:36:31 -0800
commit3655a19fdd9891c1e3a568d77483a11b2ad70951 (patch)
treec88db24fc129c5d2c4bc1019330436d29c4da025 /target-i386
parent4eeb3939b5b4731747cb38a9e6b8fb20062b5ef1 (diff)
downloadqemu-3655a19fdd9891c1e3a568d77483a11b2ad70951.tar.gz
target-i386: Use MO_BE for movbe
Fold the bswap into the memory operation. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
Diffstat (limited to 'target-i386')
-rw-r--r--target-i386/translate.c40
1 files changed, 5 insertions, 35 deletions
diff --git a/target-i386/translate.c b/target-i386/translate.c
index cfd75dc79f..c07062c388 100644
--- a/target-i386/translate.c
+++ b/target-i386/translate.c
@@ -3869,44 +3869,14 @@ static void gen_sse(CPUX86State *env, DisasContext *s, int b,
ot = MO_64;
}
- /* Load the data incoming to the bswap. Note that the TCG
- implementation of bswap requires the input be zero
- extended. In the case of the loads, we simply know that
- gen_op_ld_v via gen_ldst_modrm does that already. */
- if ((b & 1) == 0) {
- gen_ldst_modrm(env, s, modrm, ot, OR_TMP0, 0);
- } else {
- switch (ot) {
- case MO_16:
- tcg_gen_ext16u_tl(cpu_T[0], cpu_regs[reg]);
- break;
- default:
- tcg_gen_ext32u_tl(cpu_T[0], cpu_regs[reg]);
- break;
- case MO_64:
- tcg_gen_mov_tl(cpu_T[0], cpu_regs[reg]);
- break;
- }
- }
-
- switch (ot) {
- case MO_16:
- tcg_gen_bswap16_tl(cpu_T[0], cpu_T[0]);
- break;
- default:
- tcg_gen_bswap32_tl(cpu_T[0], cpu_T[0]);
- break;
-#ifdef TARGET_X86_64
- case MO_64:
- tcg_gen_bswap64_tl(cpu_T[0], cpu_T[0]);
- break;
-#endif
- }
-
+ gen_lea_modrm(env, s, modrm);
if ((b & 1) == 0) {
+ tcg_gen_qemu_ld_tl(cpu_T[0], cpu_A0,
+ s->mem_index, ot | MO_BE);
gen_op_mov_reg_T0(ot, reg);
} else {
- gen_ldst_modrm(env, s, modrm, ot, OR_TMP0, 1);
+ tcg_gen_qemu_st_tl(cpu_regs[reg], cpu_A0,
+ s->mem_index, ot | MO_BE);
}
break;