diff options
| author | Richard Henderson <rth@twiddle.net> | 2013-11-05 12:27:09 +1000 |
|---|---|---|
| committer | Richard Henderson <rth@twiddle.net> | 2014-01-07 11:36:32 -0800 |
| commit | f0706f0c939ea751e8bb164f58594e254749b7fd (patch) | |
| tree | 98cf6ff520baec91ef1933baf21d28b7dd77b444 /target-i386 | |
| parent | 40b90233d260446a6d4099f41f0aed1b77962248 (diff) | |
| download | qemu-f0706f0c939ea751e8bb164f58594e254749b7fd.tar.gz | |
target-i386: Remove gen_op_andl_T0_im
Replace it with its definition.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <rth@twiddle.net>
Diffstat (limited to 'target-i386')
| -rw-r--r-- | target-i386/translate.c | 20 |
1 files changed, 9 insertions, 11 deletions
diff --git a/target-i386/translate.c b/target-i386/translate.c index 502d129b66..6051c2c0f0 100644 --- a/target-i386/translate.c +++ b/target-i386/translate.c @@ -252,11 +252,6 @@ static void gen_update_cc_op(DisasContext *s) } } -static inline void gen_op_andl_T0_im(uint32_t val) -{ - tcg_gen_andi_tl(cpu_T[0], cpu_T[0], val); -} - static inline void gen_op_movl_T0_T1(void) { tcg_gen_mov_tl(cpu_T[0], cpu_T[1]); @@ -7363,8 +7358,9 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s, gen_op_st_v(s, MO_16, cpu_T[0], cpu_A0); gen_add_A0_im(s, 2); tcg_gen_ld_tl(cpu_T[0], cpu_env, offsetof(CPUX86State, gdt.base)); - if (!s->dflag) - gen_op_andl_T0_im(0xffffff); + if (s->dflag == 0) { + tcg_gen_andi_tl(cpu_T[0], cpu_T[0], 0xffffff); + } gen_op_st_v(s, CODE64(s) + MO_32, cpu_T[0], cpu_A0); break; case 1: @@ -7426,8 +7422,9 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s, gen_op_st_v(s, MO_16, cpu_T[0], cpu_A0); gen_add_A0_im(s, 2); tcg_gen_ld_tl(cpu_T[0], cpu_env, offsetof(CPUX86State, idt.base)); - if (!s->dflag) - gen_op_andl_T0_im(0xffffff); + if (s->dflag == 0) { + tcg_gen_andi_tl(cpu_T[0], cpu_T[0], 0xffffff); + } gen_op_st_v(s, CODE64(s) + MO_32, cpu_T[0], cpu_A0); } break; @@ -7526,8 +7523,9 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s, gen_op_ld_v(s, MO_16, cpu_T[1], cpu_A0); gen_add_A0_im(s, 2); gen_op_ld_v(s, CODE64(s) + MO_32, cpu_T[0], cpu_A0); - if (!s->dflag) - gen_op_andl_T0_im(0xffffff); + if (s->dflag == 0) { + tcg_gen_andi_tl(cpu_T[0], cpu_T[0], 0xffffff); + } if (op == 2) { tcg_gen_st_tl(cpu_T[0], cpu_env, offsetof(CPUX86State,gdt.base)); tcg_gen_st32_tl(cpu_T[1], cpu_env, offsetof(CPUX86State,gdt.limit)); |