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| author | Jan Kiszka <jan.kiszka@siemens.com> | 2009-06-27 09:53:51 +0200 |
|---|---|---|
| committer | Anthony Liguori <aliguori@us.ibm.com> | 2009-07-16 08:28:13 -0500 |
| commit | 84273177f25886b3476138470280890001debcbc (patch) | |
| tree | 6468cd7d15092492cc5cd7930ab024c7b5cd98aa /target-i386 | |
| parent | b1631e7a6f63150ce07747a93fc98ff7d5ee766b (diff) | |
| download | qemu-84273177f25886b3476138470280890001debcbc.tar.gz | |
gdbstub: x86: Support for setting segment registers
This allows to set segment registers via gdb also in system emulation
mode. Basic sanity checks are applied and nothing is changed if they
fail. But screwing up the target via this interface will never be
complicated, so I avoided being too paranoid here.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Diffstat (limited to 'target-i386')
| -rw-r--r-- | target-i386/cpu.h | 4 | ||||
| -rw-r--r-- | target-i386/helper.c | 30 |
2 files changed, 34 insertions, 0 deletions
diff --git a/target-i386/cpu.h b/target-i386/cpu.h index 372fe3169b..33555f8325 100644 --- a/target-i386/cpu.h +++ b/target-i386/cpu.h @@ -770,6 +770,10 @@ static inline void cpu_x86_load_seg_cache(CPUX86State *env, } } +int cpu_x86_get_descr_debug(CPUX86State *env, unsigned int selector, + target_ulong *base, unsigned int *limit, + unsigned int *flags); + /* wrapper, just in case memory mappings must be changed */ static inline void cpu_x86_set_cpl(CPUX86State *s, int cpl) { diff --git a/target-i386/helper.c b/target-i386/helper.c index ce5346c317..18c4befea8 100644 --- a/target-i386/helper.c +++ b/target-i386/helper.c @@ -1782,6 +1782,36 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count, } } + +int cpu_x86_get_descr_debug(CPUX86State *env, unsigned int selector, + target_ulong *base, unsigned int *limit, + unsigned int *flags) +{ + SegmentCache *dt; + target_ulong ptr; + uint32_t e1, e2; + int index; + + if (selector & 0x4) + dt = &env->ldt; + else + dt = &env->gdt; + index = selector & ~7; + ptr = dt->base + index; + if ((index + 7) > dt->limit + || cpu_memory_rw_debug(env, ptr, (uint8_t *)&e1, sizeof(e1), 0) != 0 + || cpu_memory_rw_debug(env, ptr+4, (uint8_t *)&e2, sizeof(e2), 0) != 0) + return 0; + + *base = ((e1 >> 16) | ((e2 & 0xff) << 16) | (e2 & 0xff000000)); + *limit = (e1 & 0xffff) | (e2 & 0x000f0000); + if (e2 & DESC_G_MASK) + *limit = (*limit << 12) | 0xfff; + *flags = e2; + + return 1; +} + CPUX86State *cpu_x86_init(const char *cpu_model) { CPUX86State *env; |