diff options
| author | bellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162> | 2005-12-17 02:59:58 +0000 |
|---|---|---|
| committer | bellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162> | 2005-12-17 02:59:58 +0000 |
| commit | cd072e01d86b3d7adab35de03d242e3938e798df (patch) | |
| tree | d4970153c4ad19721b19f5e08d547f0451153109 /target-i386 | |
| parent | d3e9db933f416c9f1c04df4834d36e2315952e42 (diff) | |
| download | qemu-cd072e01d86b3d7adab35de03d242e3938e798df.tar.gz | |
fixed null segment validation (aka x86_64 regression bug)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1708 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-i386')
| -rw-r--r-- | target-i386/helper.c | 9 |
1 files changed, 8 insertions, 1 deletions
diff --git a/target-i386/helper.c b/target-i386/helper.c index 531ba1b155..a649242220 100644 --- a/target-i386/helper.c +++ b/target-i386/helper.c @@ -1986,7 +1986,14 @@ static inline void validate_seg(int seg_reg, int cpl) { int dpl; uint32_t e2; - + + /* XXX: on x86_64, we do not want to nullify FS and GS because + they may still contain a valid base. I would be interested to + know how a real x86_64 CPU behaves */ + if ((seg_reg == R_FS || seg_reg == R_GS) && + (env->segs[seg_reg].selector & 0xfffc) == 0) + return; + e2 = env->segs[seg_reg].flags; dpl = (e2 >> DESC_DPL_SHIFT) & 3; if (!(e2 & DESC_CS_MASK) || !(e2 & DESC_C_MASK)) { |