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| author | Andreas Färber <afaerber@suse.de> | 2013-01-16 03:31:27 +0100 |
|---|---|---|
| committer | Andreas Färber <afaerber@suse.de> | 2013-02-16 14:50:57 +0100 |
| commit | 9c23169e8cd54b490d55221b6498d42966f964f3 (patch) | |
| tree | 9b042a27c4493c73b92c8a858d1630743728856f /target-lm32/cpu-qom.h | |
| parent | ca45f8b0440358ccca63446cf0df05772791b2a1 (diff) | |
| download | qemu-9c23169e8cd54b490d55221b6498d42966f964f3.tar.gz | |
target-lm32: Introduce QOM realizefn for LM32CPU
Introduce a realizefn and set realized = true in cpu_lm32_init().
Also move cpu_reset() call from initfn to realizefn.
Signed-off-by: Andreas Färber <afaerber@suse.de>
Diffstat (limited to 'target-lm32/cpu-qom.h')
| -rw-r--r-- | target-lm32/cpu-qom.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/target-lm32/cpu-qom.h b/target-lm32/cpu-qom.h index 400cdbd554..d7525b300c 100644 --- a/target-lm32/cpu-qom.h +++ b/target-lm32/cpu-qom.h @@ -34,6 +34,7 @@ /** * LM32CPUClass: + * @parent_realize: The parent class' realize handler. * @parent_reset: The parent class' reset handler. * * A LatticeMico32 CPU model. @@ -43,6 +44,7 @@ typedef struct LM32CPUClass { CPUClass parent_class; /*< public >*/ + DeviceRealize parent_realize; void (*parent_reset)(CPUState *cpu); } LM32CPUClass; |