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authorPeter Maydell <peter.maydell@linaro.org>2011-05-05 19:35:35 +0100
committerAurelien Jarno <aurelien@aurel32.net>2011-05-15 00:22:57 +0200
commit605a6aed56963360b744355d0c25da9e26a9bb0a (patch)
tree01eb1e9b1ef71d525971a77b57fe6069629b9154 /target-lm32/translate.c
parentde1db2a172074a9ed7756d21823a70181b9a1dfb (diff)
downloadqemu-605a6aed56963360b744355d0c25da9e26a9bb0a.tar.gz
target-arm: Fix VMLA, VMLS, VNMLS, VNMLA handling of NaNs
Correct handling of NaNs for VFP VMLA, VMLS, VNMLS and VNMLA requires that we implement the set of negations and additions specified by the ARM ARM; plausible looking simplifications like turning (-A + B) into (B - A) or computing (A + B) rather than (B + A) result in selecting the wrong NaN or returning a NaN with the wrong sign bit. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Diffstat (limited to 'target-lm32/translate.c')
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