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| author | pbrook <pbrook@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-05-29 14:57:59 +0000 |
|---|---|---|
| committer | pbrook <pbrook@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-05-29 14:57:59 +0000 |
| commit | acf930aaa3763be08a41f2478b3e0b252f545cd0 (patch) | |
| tree | 087d303e39cc7e186a20bfef4842131edef3a1ad /target-m68k/cpu.h | |
| parent | 2b8bdefc3a35473e1d43c22e6201aad900dccad2 (diff) | |
| download | qemu-acf930aaa3763be08a41f2478b3e0b252f545cd0.tar.gz | |
ColdFire EMAC support.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2895 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-m68k/cpu.h')
| -rw-r--r-- | target-m68k/cpu.h | 19 |
1 files changed, 19 insertions, 0 deletions
diff --git a/target-m68k/cpu.h b/target-m68k/cpu.h index a81b91dffd..acbb51690d 100644 --- a/target-m68k/cpu.h +++ b/target-m68k/cpu.h @@ -71,6 +71,14 @@ typedef struct CPUM68KState { uint32_t fpsr; float_status fp_status; + uint64_t mactmp; + /* EMAC Hardware deals with 48-bit values composed of one 32-bit and + two 8-bit parts. We store a single 64-bit value and + rearrange/extend this when changing modes. */ + uint64_t macc[4]; + uint32_t macsr; + uint32_t mac_mask; + /* Temporary storage for DIV helpers. */ uint32_t div1; uint32_t div2; @@ -143,11 +151,22 @@ enum { #define SR_S 0x2000 #define SR_T 0x8000 +#define MACSR_PAV0 0x100 +#define MACSR_OMC 0x080 +#define MACSR_SU 0x040 +#define MACSR_FI 0x020 +#define MACSR_RT 0x010 +#define MACSR_N 0x008 +#define MACSR_Z 0x004 +#define MACSR_V 0x002 +#define MACSR_EV 0x001 + typedef struct m68k_def_t m68k_def_t; int cpu_m68k_set_model(CPUM68KState *env, const char * name); void m68k_set_irq_level(CPUM68KState *env, int level, uint8_t vector); +void m68k_set_macsr(CPUM68KState *env, uint32_t val); #define M68K_FPCR_PREC (1 << 6) |