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| author | pbrook <pbrook@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-05-29 14:57:59 +0000 |
|---|---|---|
| committer | pbrook <pbrook@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-05-29 14:57:59 +0000 |
| commit | acf930aaa3763be08a41f2478b3e0b252f545cd0 (patch) | |
| tree | 087d303e39cc7e186a20bfef4842131edef3a1ad /target-m68k/helper.c | |
| parent | 2b8bdefc3a35473e1d43c22e6201aad900dccad2 (diff) | |
| download | qemu-acf930aaa3763be08a41f2478b3e0b252f545cd0.tar.gz | |
ColdFire EMAC support.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2895 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-m68k/helper.c')
| -rw-r--r-- | target-m68k/helper.c | 38 |
1 files changed, 36 insertions, 2 deletions
diff --git a/target-m68k/helper.c b/target-m68k/helper.c index 12e3f78676..bdbc1de396 100644 --- a/target-m68k/helper.c +++ b/target-m68k/helper.c @@ -69,7 +69,6 @@ int cpu_m68k_set_model(CPUM68KState *env, const char * name) m68k_set_feature(env, M68K_FEATURE_CF_ISA_B); m68k_set_feature(env, M68K_FEATURE_CF_ISA_C); m68k_set_feature(env, M68K_FEATURE_CF_FPU); - m68k_set_feature(env, M68K_FEATURE_CF_MAC); m68k_set_feature(env, M68K_FEATURE_CF_EMAC); break; case M68K_CPUID_ANY: @@ -77,7 +76,8 @@ int cpu_m68k_set_model(CPUM68KState *env, const char * name) m68k_set_feature(env, M68K_FEATURE_CF_ISA_B); m68k_set_feature(env, M68K_FEATURE_CF_ISA_C); m68k_set_feature(env, M68K_FEATURE_CF_FPU); - m68k_set_feature(env, M68K_FEATURE_CF_MAC); + /* MAC and EMAC are mututally exclusive, so pick EMAC. + It's mostly backwards compatible. */ m68k_set_feature(env, M68K_FEATURE_CF_EMAC); m68k_set_feature(env, M68K_FEATURE_EXT_FULL); break; @@ -227,6 +227,40 @@ void helper_movec(CPUM68KState *env, int reg, uint32_t val) } } +void m68k_set_macsr(CPUM68KState *env, uint32_t val) +{ + uint32_t acc; + int8_t exthigh; + uint8_t extlow; + uint64_t regval; + int i; + if ((env->macsr ^ val) & (MACSR_FI | MACSR_SU)) { + for (i = 0; i < 4; i++) { + regval = env->macc[i]; + exthigh = regval >> 40; + if (env->macsr & MACSR_FI) { + acc = regval >> 8; + extlow = regval; + } else { + acc = regval; + extlow = regval >> 32; + } + if (env->macsr & MACSR_FI) { + regval = (((uint64_t)acc) << 8) | extlow; + regval |= ((int64_t)exthigh) << 40; + } else if (env->macsr & MACSR_SU) { + regval = acc | (((int64_t)extlow) << 32); + regval |= ((int64_t)exthigh) << 40; + } else { + regval = acc | (((uint64_t)extlow) << 32); + regval |= ((uint64_t)(uint8_t)exthigh) << 40; + } + env->macc[i] = regval; + } + } + env->macsr = val; +} + /* MMU */ /* TODO: This will need fixing once the MMU is implemented. */ |