summaryrefslogtreecommitdiff
path: root/target-microblaze/cpu.h
diff options
context:
space:
mode:
authorPeter A. G. Crosthwaite <peter.crosthwaite@petalogix.com>2012-06-01 13:23:28 +1000
committerEdgar E. Iglesias <edgar.iglesias@gmail.com>2012-06-04 10:19:46 +0200
commit8cc9b43f7c5f826b39af4b012ad89bb55faac29c (patch)
tree91df24721384fd897840172e0af0d8507c66b60c /target-microblaze/cpu.h
parent9c92bf7f6c3f675e60b8ba8a5287bb88ea1eac36 (diff)
downloadqemu-8cc9b43f7c5f826b39af4b012ad89bb55faac29c.tar.gz
target-microblaze: lwx/swx: first implementation
Signed-off-by: Peter A. G. Crosthwaite <peter.crosthwaite@petalogix.com> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
Diffstat (limited to 'target-microblaze/cpu.h')
-rw-r--r--target-microblaze/cpu.h4
1 files changed, 4 insertions, 0 deletions
diff --git a/target-microblaze/cpu.h b/target-microblaze/cpu.h
index 718d5bba8d..b0ba9fe296 100644
--- a/target-microblaze/cpu.h
+++ b/target-microblaze/cpu.h
@@ -243,6 +243,10 @@ struct CPUMBState {
/* Stack protectors. Yes, it's a hw feature. */
uint32_t slr, shr;
+ /* lwx/swx reserved address */
+#define RES_ADDR_NONE 0xffffffff /* Use 0xffffffff to indicate no reservation */
+ uint32_t res_addr;
+
/* Internal flags. */
#define IMM_FLAG 4
#define MSR_EE_FLAG (1 << 8)