diff options
| author | Edgar E. Iglesias <edgar.iglesias@gmail.com> | 2013-10-24 19:18:28 +0200 |
|---|---|---|
| committer | Edgar E. Iglesias <edgar.iglesias@gmail.com> | 2013-10-24 22:32:56 +0200 |
| commit | 09b9f113ad9e2bad57b41f6c67228353972ad1af (patch) | |
| tree | 5e48b0c96401928930c001efe5d3645b28466e06 /target-microblaze | |
| parent | bb3cb951ef530da7d248051347c974e4d20e6ea0 (diff) | |
| download | qemu-09b9f113ad9e2bad57b41f6c67228353972ad1af.tar.gz | |
microblaze: Improve src
Microblaze carry is mirrored in MSR[31], pick it directly from
there. Also, no need to mask cpu_R[dc->ra] when calling
write_carry.
15% improvement in linux-user src loops.
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
Diffstat (limited to 'target-microblaze')
| -rw-r--r-- | target-microblaze/translate.c | 15 |
1 files changed, 4 insertions, 11 deletions
diff --git a/target-microblaze/translate.c b/target-microblaze/translate.c index 93aafac691..232015aa9c 100644 --- a/target-microblaze/translate.c +++ b/target-microblaze/translate.c @@ -750,7 +750,7 @@ static void dec_barrel(DisasContext *dc) static void dec_bit(DisasContext *dc) { - TCGv t0, t1; + TCGv t0; unsigned int op; int mem_index = cpu_mmu_index(dc->env); @@ -761,19 +761,12 @@ static void dec_bit(DisasContext *dc) t0 = tcg_temp_new(); LOG_DIS("src r%d r%d\n", dc->rd, dc->ra); - tcg_gen_andi_tl(t0, cpu_R[dc->ra], 1); + tcg_gen_andi_tl(t0, cpu_SR[SR_MSR], MSR_CC); + write_carry(dc, cpu_R[dc->ra]); if (dc->rd) { - t1 = tcg_temp_new(); - read_carry(dc, t1); - tcg_gen_shli_tl(t1, t1, 31); - tcg_gen_shri_tl(cpu_R[dc->rd], cpu_R[dc->ra], 1); - tcg_gen_or_tl(cpu_R[dc->rd], cpu_R[dc->rd], t1); - tcg_temp_free(t1); + tcg_gen_or_tl(cpu_R[dc->rd], cpu_R[dc->rd], t0); } - - /* Update carry. */ - write_carry(dc, t0); tcg_temp_free(t0); break; |