summaryrefslogtreecommitdiff
path: root/target-mips/cpu.h
diff options
context:
space:
mode:
authorPeter Maydell <peter.maydell@linaro.org>2014-03-17 16:00:34 +0000
committerMichael Tokarev <mjt@tls.msk.ru>2014-03-27 19:22:49 +0400
commitf45cb2f43f5bb0a4122a64e61c746048b59a84ed (patch)
tree65b2d220048908395dfca31fdea9ef683d01bf88 /target-mips/cpu.h
parentd9631b90da6ac592ea76b41a654dd5d29b2645d4 (diff)
downloadqemu-f45cb2f43f5bb0a4122a64e61c746048b59a84ed.tar.gz
target-mips: Avoid shifting left into sign bit
Add U suffix to various places where we shift a 1 left by 31, to avoid undefined behaviour. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
Diffstat (limited to 'target-mips/cpu.h')
-rw-r--r--target-mips/cpu.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/target-mips/cpu.h b/target-mips/cpu.h
index 3ba3229e66..6c2014eddd 100644
--- a/target-mips/cpu.h
+++ b/target-mips/cpu.h
@@ -775,7 +775,7 @@ static inline void compute_hflags(CPUMIPSState *env)
and disable the MIPS IV extensions to the MIPS III ISA.
Some other MIPS IV CPUs ignore the bit, so the check here
would be too restrictive for them. */
- if (env->CP0_Status & (1 << CP0St_CU3)) {
+ if (env->CP0_Status & (1U << CP0St_CU3)) {
env->hflags |= MIPS_HFLAG_COP1X;
}
}