diff options
| author | Anthony Liguori <aliguori@us.ibm.com> | 2012-11-01 11:12:32 -0500 |
|---|---|---|
| committer | Anthony Liguori <aliguori@us.ibm.com> | 2012-11-01 11:12:32 -0500 |
| commit | 98c8a73b2e82eecac359b0b55a2d9d69f0a916ff (patch) | |
| tree | 83411ea890eb54266773ad4337fc91c49dd36999 /target-mips/cpu.h | |
| parent | fc53b7d4b7fe409acae7d8d55a868eb5c696d71c (diff) | |
| parent | 839b5630cd4f49ce10618a7bf0b705b76f3a01ca (diff) | |
| download | qemu-98c8a73b2e82eecac359b0b55a2d9d69f0a916ff.tar.gz | |
Merge remote-tracking branch 'afaerber/qom-cpu' into staging
* afaerber/qom-cpu: (35 commits)
target-i386: Pass X86CPU to kvm_handle_halt()
target-i386: Pass X86CPU to kvm_get_mp_state()
cpu: Move thread_id to CPUState
cpus: Pass CPUState to run_on_cpu()
target-i386: Pass X86CPU to cpu_x86_inject_mce()
target-i386: Pass X86CPU to kvm_mce_inject()
cpus: Pass CPUState to [qemu_]cpu_has_work()
spapr: Pass PowerPCCPU to hypercalls
spapr: Pass PowerPCCPU to spapr_hypercall()
target-ppc: Pass PowerPCCPU to cpu_ppc_hypercall
target-ppc: Pass PowerPCCPU to powerpc_excp()
xtensa_pic: Pass XtensaCPU to xtensa_ccompare_cb()
cpus: Pass CPUState to qemu_wait_io_event_common()
cpus: Pass CPUState to flush_queued_work()
cpu: Move queued_work_{first,last} to CPUState
cpus: Pass CPUState to qemu_cpu_kick()
target-ppc: Rename kvm_kick_{env => cpu} and pass PowerPCCPU
ppc: Pass PowerPCCPU to {ppc6xx,ppc970,power7,ppc40x,ppce500}_set_irq()
cpus: Pass CPUState to qemu_tcg_init_vcpu()
cpus: Pass CPUState to qemu_tcg_cpu_thread_fn
...
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Diffstat (limited to 'target-mips/cpu.h')
| -rw-r--r-- | target-mips/cpu.h | 11 |
1 files changed, 6 insertions, 5 deletions
diff --git a/target-mips/cpu.h b/target-mips/cpu.h index 4c012d503f..aebb2d5b79 100644 --- a/target-mips/cpu.h +++ b/target-mips/cpu.h @@ -710,16 +710,17 @@ static inline int mips_vpe_active(CPUMIPSState *env) return active; } -static inline int cpu_has_work(CPUMIPSState *env) +static inline bool cpu_has_work(CPUState *cpu) { - int has_work = 0; + CPUMIPSState *env = &MIPS_CPU(cpu)->env; + bool has_work = false; /* It is implementation dependent if non-enabled interrupts wake-up the CPU, however most of the implementations only check for interrupts that can be taken. */ if ((env->interrupt_request & CPU_INTERRUPT_HARD) && cpu_mips_hw_interrupts_pending(env)) { - has_work = 1; + has_work = true; } /* MIPS-MT has the ability to halt the CPU. */ @@ -727,11 +728,11 @@ static inline int cpu_has_work(CPUMIPSState *env) /* The QEMU model will issue an _WAKE request whenever the CPUs should be woken up. */ if (env->interrupt_request & CPU_INTERRUPT_WAKE) { - has_work = 1; + has_work = true; } if (!mips_vpe_active(env)) { - has_work = 0; + has_work = false; } } return has_work; |