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| author | Maciej W. Rozycki <macro@codesourcery.com> | 2014-12-02 17:02:38 +0000 |
|---|---|---|
| committer | Leon Alrae <leon.alrae@imgtec.com> | 2014-12-16 12:45:20 +0000 |
| commit | bb962386b82c1b0e9e12fdb6b9bb62106bf1f822 (patch) | |
| tree | 3eeb6545f0a1f96fd22a448b14978a080e08d9b1 /target-mips/cpu.h | |
| parent | 74797f40dc3e17633fea614f08c828020f755b28 (diff) | |
| download | qemu-bb962386b82c1b0e9e12fdb6b9bb62106bf1f822.tar.gz | |
target-mips: Add missing calls to synchronise SoftFloat status
Add missing calls to synchronise the SoftFloat status with the CP1.FSCR:
+ for the rounding and flush-to-zero modes upon processor reset,
+ for the flush-to-zero mode on FSCR updates through the GDB stub.
Refactor code accordingly and remove the redundant RESTORE_ROUNDING_MODE
macro.
Signed-off-by: Thomas Schwinge <thomas@codesourcery.com>
Signed-off-by: Maciej W. Rozycki <macro@codesourcery.com>
Reviewed-by: Leon Alrae <leon.alrae@imgtec.com>
Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
Diffstat (limited to 'target-mips/cpu.h')
| -rw-r--r-- | target-mips/cpu.h | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/target-mips/cpu.h b/target-mips/cpu.h index f8cf143198..8875c975e0 100644 --- a/target-mips/cpu.h +++ b/target-mips/cpu.h @@ -777,6 +777,18 @@ target_ulong exception_resume_pc (CPUMIPSState *env); extern unsigned int ieee_rm[]; int ieee_ex_to_mips(int xcpt); +static inline void restore_rounding_mode(CPUMIPSState *env) +{ + set_float_rounding_mode(ieee_rm[env->active_fpu.fcr31 & 3], + &env->active_fpu.fp_status); +} + +static inline void restore_flush_mode(CPUMIPSState *env) +{ + set_flush_to_zero((env->active_fpu.fcr31 & (1 << 24)) != 0, + &env->active_fpu.fp_status); +} + static inline void cpu_get_tb_cpu_state(CPUMIPSState *env, target_ulong *pc, target_ulong *cs_base, int *flags) { |