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| author | ths <ths@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-05-29 16:52:57 +0000 |
|---|---|---|
| committer | ths <ths@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-05-29 16:52:57 +0000 |
| commit | 5e755519ac9d867f7da13f58a9d0c262db82e14c (patch) | |
| tree | d456b4a7ec2d2b3b6ee6f8b4f87ab9a041b22555 /target-mips/cpu.h | |
| parent | acf930aaa3763be08a41f2478b3e0b252f545cd0 (diff) | |
| download | qemu-5e755519ac9d867f7da13f58a9d0c262db82e14c.tar.gz | |
Don't check the FPU state for each FPU instruction, use hflags to
handle this per-tb.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2896 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-mips/cpu.h')
| -rw-r--r-- | target-mips/cpu.h | 8 |
1 files changed, 5 insertions, 3 deletions
diff --git a/target-mips/cpu.h b/target-mips/cpu.h index 17ac4ac875..2736614cd4 100644 --- a/target-mips/cpu.h +++ b/target-mips/cpu.h @@ -258,9 +258,11 @@ struct CPUMIPSState { #define MIPS_HFLAG_TMASK 0x007F #define MIPS_HFLAG_MODE 0x001F /* execution modes */ #define MIPS_HFLAG_UM 0x0001 /* user mode */ -#define MIPS_HFLAG_DM 0x0008 /* Debug mode */ -#define MIPS_HFLAG_SM 0x0010 /* Supervisor mode */ -#define MIPS_HFLAG_64 0x0020 /* 64-bit instructions enabled */ +#define MIPS_HFLAG_DM 0x0002 /* Debug mode */ +#define MIPS_HFLAG_SM 0x0004 /* Supervisor mode */ +#define MIPS_HFLAG_64 0x0008 /* 64-bit instructions enabled */ +#define MIPS_HFLAG_FPU 0x0010 /* FPU enabled */ +#define MIPS_HFLAG_F64 0x0020 /* 64-bit FPU enabled */ #define MIPS_HFLAG_RE 0x0040 /* Reversed endianness */ /* If translation is interrupted between the branch instruction and * the delay slot, record what type of branch it is so that we can |