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authorths <ths@c046a42c-6fe2-441c-8c8c-71466251a162>2008-09-18 11:57:27 +0000
committerths <ths@c046a42c-6fe2-441c-8c8c-71466251a162>2008-09-18 11:57:27 +0000
commitf01be154589f6e137195d9cc28d1296d885e4eea (patch)
treeb8effdfbfaddddcbbd81e876a62ff18da6686c0f /target-mips/exec.h
parenta1cf28f469883f89e83d6026986254806e88c235 (diff)
downloadqemu-f01be154589f6e137195d9cc28d1296d885e4eea.tar.gz
Move the active FPU registers into env again, and use more TCG registers
to access them. Signed-off-by: Thiemo Seufer <ths@networkno.de> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5252 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-mips/exec.h')
-rw-r--r--target-mips/exec.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/target-mips/exec.h b/target-mips/exec.h
index de6e6dd103..28bf466ff5 100644
--- a/target-mips/exec.h
+++ b/target-mips/exec.h
@@ -86,7 +86,7 @@ static inline void compute_hflags(CPUState *env)
if (env->CP0_Status & (1 << CP0St_FR))
env->hflags |= MIPS_HFLAG_F64;
if (env->insn_flags & ISA_MIPS32R2) {
- if (env->fpu->fcr0 & (1 << FCR0_F64))
+ if (env->active_fpu.fcr0 & (1 << FCR0_F64))
env->hflags |= MIPS_HFLAG_COP1X;
} else if (env->insn_flags & ISA_MIPS32) {
if (env->hflags & MIPS_HFLAG_64)