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authorths <ths@c046a42c-6fe2-441c-8c8c-71466251a162>2008-06-24 21:58:35 +0000
committerths <ths@c046a42c-6fe2-441c-8c8c-71466251a162>2008-06-24 21:58:35 +0000
commit1a3fd9c3da4e2d9434a14168306b2fa0abadce18 (patch)
tree1819501244acc520739c15d158295bf636d46296 /target-mips/exec.h
parente1bf387ec851e56819e4fdd965bc8bdd67167449 (diff)
downloadqemu-1a3fd9c3da4e2d9434a14168306b2fa0abadce18.tar.gz
Remove remaining uses of T0 in the MIPS target.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4788 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-mips/exec.h')
-rw-r--r--target-mips/exec.h6
1 files changed, 0 insertions, 6 deletions
diff --git a/target-mips/exec.h b/target-mips/exec.h
index 6b351da114..a7014eea13 100644
--- a/target-mips/exec.h
+++ b/target-mips/exec.h
@@ -10,12 +10,6 @@
register struct CPUMIPSState *env asm(AREG0);
-#if TARGET_LONG_BITS > HOST_LONG_BITS
-#define T0 (env->t0)
-#else
-register target_ulong T0 asm(AREG1);
-#endif
-
#if defined (USE_HOST_FLOAT_REGS)
#error "implement me."
#else