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authorAndreas Färber <afaerber@suse.de>2013-06-29 18:55:54 +0200
committerAndreas Färber <afaerber@suse.de>2013-07-23 02:41:33 +0200
commit00b941e581b5c42645f836ef530705bb76a3e6bb (patch)
tree4c291f0999809416681f06f575b8ec1288744c2d /target-mips/helper.c
parent385b9f0e4d8c60037c937edd7a3735fff7570429 (diff)
downloadqemu-00b941e581b5c42645f836ef530705bb76a3e6bb.tar.gz
cpu: Turn cpu_get_phys_page_debug() into a CPUClass hook
Change breakpoint_invalidate() argument to CPUState alongside. Since all targets now assign a softmmu-only field, we can drop helpers cpu_class_set_{do_unassigned_access,vmsd}() and device_class_set_vmsd(). Prepares for changing cpu_memory_rw_debug() argument to CPUState. Acked-by: Max Filippov <jcmvbkbc@gmail.com> (for xtensa) Signed-off-by: Andreas Färber <afaerber@suse.de>
Diffstat (limited to 'target-mips/helper.c')
-rw-r--r--target-mips/helper.c7
1 files changed, 5 insertions, 2 deletions
diff --git a/target-mips/helper.c b/target-mips/helper.c
index 6983b92a11..6feef7bcd6 100644
--- a/target-mips/helper.c
+++ b/target-mips/helper.c
@@ -254,13 +254,16 @@ static void raise_mmu_exception(CPUMIPSState *env, target_ulong address,
}
#if !defined(CONFIG_USER_ONLY)
-hwaddr cpu_get_phys_page_debug(CPUMIPSState *env, target_ulong addr)
+hwaddr mips_cpu_get_phys_page_debug(CPUState *cs, vaddr addr)
{
+ MIPSCPU *cpu = MIPS_CPU(cs);
hwaddr phys_addr;
int prot;
- if (get_physical_address(env, &phys_addr, &prot, addr, 0, ACCESS_INT) != 0)
+ if (get_physical_address(&cpu->env, &phys_addr, &prot, addr, 0,
+ ACCESS_INT) != 0) {
return -1;
+ }
return phys_addr;
}
#endif