diff options
| author | ths <ths@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-09-30 01:58:33 +0000 |
|---|---|---|
| committer | ths <ths@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-09-30 01:58:33 +0000 |
| commit | 540635ba650bd2529ce55c4135cd594a5fa109b5 (patch) | |
| tree | e609e602a027047c3151159dc55c02550e80ea5e /target-mips/helper.c | |
| parent | 868d585aced5457218b3443398d08594d9c3ba6d (diff) | |
| download | qemu-540635ba650bd2529ce55c4135cd594a5fa109b5.tar.gz | |
Code provision for n32/n64 mips userland emulation. Not functional yet.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3284 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-mips/helper.c')
| -rw-r--r-- | target-mips/helper.c | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/target-mips/helper.c b/target-mips/helper.c index 7424cda560..9c72481c2a 100644 --- a/target-mips/helper.c +++ b/target-mips/helper.c @@ -76,7 +76,7 @@ int r4k_map_address (CPUState *env, target_ulong *physical, int *prot, target_ulong mask = tlb->PageMask | ~(TARGET_PAGE_MASK << 1); target_ulong tag = address & ~mask; target_ulong VPN = tlb->VPN & ~mask; -#ifdef TARGET_MIPS64 +#if defined(TARGET_MIPSN32) || defined(TARGET_MIPS64) tag &= env->SEGMask; #endif @@ -108,7 +108,7 @@ static int get_physical_address (CPUState *env, target_ulong *physical, int user_mode = (env->hflags & MIPS_HFLAG_MODE) == MIPS_HFLAG_UM; int supervisor_mode = (env->hflags & MIPS_HFLAG_MODE) == MIPS_HFLAG_SM; int kernel_mode = !user_mode && !supervisor_mode; -#ifdef TARGET_MIPS64 +#if defined(TARGET_MIPSN32) || defined(TARGET_MIPS64) int UX = (env->CP0_Status & (1 << CP0St_UX)) != 0; int SX = (env->CP0_Status & (1 << CP0St_SX)) != 0; int KX = (env->CP0_Status & (1 << CP0St_KX)) != 0; @@ -130,7 +130,7 @@ static int get_physical_address (CPUState *env, target_ulong *physical, } else { ret = env->tlb->map_address(env, physical, prot, address, rw, access_type); } -#ifdef TARGET_MIPS64 +#if defined(TARGET_MIPSN32) || defined(TARGET_MIPS64) /* XXX: Assuming : - PABITS = 36 (correct for MIPS64R1) @@ -308,7 +308,7 @@ int cpu_mips_handle_mmu_fault (CPUState *env, target_ulong address, int rw, ((address >> 9) & 0x007ffff0); env->CP0_EntryHi = (env->CP0_EntryHi & 0xFF) | (address & (TARGET_PAGE_MASK << 1)); -#ifdef TARGET_MIPS64 +#if defined(TARGET_MIPSN32) || defined(TARGET_MIPS64) env->CP0_EntryHi &= env->SEGMask; env->CP0_XContext = (env->CP0_XContext & ((~0ULL) << (env->SEGBITS - 7))) | ((address & 0xC00000000000ULL) >> (env->SEGBITS - 9)) | @@ -428,7 +428,7 @@ void do_interrupt (CPUState *env) case EXCP_TLBL: cause = 2; if (env->error_code == 1 && !(env->CP0_Status & (1 << CP0St_EXL))) { -#ifdef TARGET_MIPS64 +#if defined(TARGET_MIPSN32) || defined(TARGET_MIPS64) int R = env->CP0_BadVAddr >> 62; int UX = (env->CP0_Status & (1 << CP0St_UX)) != 0; int SX = (env->CP0_Status & (1 << CP0St_SX)) != 0; @@ -479,7 +479,7 @@ void do_interrupt (CPUState *env) case EXCP_THREAD: cause = 25; if (env->error_code == 1 && !(env->CP0_Status & (1 << CP0St_EXL))) { -#ifdef TARGET_MIPS64 +#if defined(TARGET_MIPSN32) || defined(TARGET_MIPS64) int R = env->CP0_BadVAddr >> 62; int UX = (env->CP0_Status & (1 << CP0St_UX)) != 0; int SX = (env->CP0_Status & (1 << CP0St_SX)) != 0; @@ -562,7 +562,7 @@ void r4k_invalidate_tlb (CPUState *env, int idx, int use_extra) mask = tlb->PageMask | ~(TARGET_PAGE_MASK << 1); if (tlb->V0) { addr = tlb->VPN & ~mask; -#ifdef TARGET_MIPS64 +#if defined(TARGET_MIPSN32) || defined(TARGET_MIPS64) if (addr >= (0xFFFFFFFF80000000ULL & env->SEGMask)) { addr |= 0x3FFFFF0000000000ULL; } @@ -575,7 +575,7 @@ void r4k_invalidate_tlb (CPUState *env, int idx, int use_extra) } if (tlb->V1) { addr = (tlb->VPN & ~mask) | ((mask >> 1) + 1); -#ifdef TARGET_MIPS64 +#if defined(TARGET_MIPSN32) || defined(TARGET_MIPS64) if (addr >= (0xFFFFFFFF80000000ULL & env->SEGMask)) { addr |= 0x3FFFFF0000000000ULL; } |