diff options
| author | ths <ths@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-04-13 20:17:54 +0000 |
|---|---|---|
| committer | ths <ths@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-04-13 20:17:54 +0000 |
| commit | e58c8ba5f6b1bd9af00cf5fcebce4bdba0f0aabb (patch) | |
| tree | c60c6d3fdd9be0629a2bdea913b8f8905c5179bd /target-mips/helper.c | |
| parent | 5425a2164c99de50ac79e29cdd2cafbc3aafd2f4 (diff) | |
| download | qemu-e58c8ba5f6b1bd9af00cf5fcebce4bdba0f0aabb.tar.gz | |
Another fix for CP0 Cause register handling.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2658 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-mips/helper.c')
| -rw-r--r-- | target-mips/helper.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/target-mips/helper.c b/target-mips/helper.c index c23e9c6b37..71a9723396 100644 --- a/target-mips/helper.c +++ b/target-mips/helper.c @@ -403,7 +403,7 @@ void do_interrupt (CPUState *env) env->PC = (int32_t)(env->CP0_EBase & ~0x3ff); } env->PC += offset; - env->CP0_Cause = (env->CP0_Cause & ~0x7C) | (cause << 2); + env->CP0_Cause = (env->CP0_Cause & ~(0x1f << CP0Ca_EC)) | (cause << CP0Ca_EC); break; default: if (logfile) { |