diff options
| author | aurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162> | 2008-11-11 11:47:06 +0000 |
|---|---|---|
| committer | aurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162> | 2008-11-11 11:47:06 +0000 |
| commit | 49bcf33cc7c94655c0a48f8de9b3473d29bb6ed0 (patch) | |
| tree | 94df6bd0899b13b0e9d5cbc00551bf7472ff1d49 /target-mips/helper.h | |
| parent | 505ad7c2ffd1caf82a6789b610bff82b8b6ad472 (diff) | |
| download | qemu-49bcf33cc7c94655c0a48f8de9b3473d29bb6ed0.tar.gz | |
target-mips: convert bit shuffle ops to TCG
Bit shuffle operations can be written with very few TCG instructions
(between 5 and 8), so it is worth converting them to TCG.
This code also move all bit shuffle generation code to a separate
function in order to have a cleaner exception code path, that is it
doesn't store back the TCG register to the target register after the
exception, as the TCG register doesn't exist anymore.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5679 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-mips/helper.h')
| -rw-r--r-- | target-mips/helper.h | 7 |
1 files changed, 0 insertions, 7 deletions
diff --git a/target-mips/helper.h b/target-mips/helper.h index 592692194e..f67c82a113 100644 --- a/target-mips/helper.h +++ b/target-mips/helper.h @@ -269,10 +269,3 @@ DEF_HELPER(target_ulong, do_rdhwr_cc, (void)) DEF_HELPER(target_ulong, do_rdhwr_ccres, (void)) DEF_HELPER(void, do_pmon, (int function)) DEF_HELPER(void, do_wait, (void)) - -/* Bit shuffle operations. */ -DEF_HELPER(target_ulong, do_wsbh, (target_ulong t1)) -#ifdef TARGET_MIPS64 -DEF_HELPER(target_ulong, do_dsbh, (target_ulong t1)) -DEF_HELPER(target_ulong, do_dshd, (target_ulong t1)) -#endif |