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authorPetar Jovanovic <petar.jovanovic@imgtec.com>2014-01-22 18:35:32 +0100
committerPetar Jovanovic <petar.jovanovic@imgtec.com>2014-02-10 16:46:38 +0100
commit736d120af4bf5f3e13b2f90c464b3a24847f78f0 (patch)
tree01cb88023c2ee383af3dcde2793e756d13b1833e /target-mips/helper.h
parentb4dd99a3636f5a3044dfd9dba7653ca377a9aeba (diff)
downloadqemu-736d120af4bf5f3e13b2f90c464b3a24847f78f0.tar.gz
target-mips: add user-mode FR switch support for MIPS32r5
Description of UFR feature: Required in MIPS32r5 if floating point is implemented and user-mode FR switching is supported. The UFR register allows user-mode to clear StatusFR by executing a CTC1 to UFR with GPR[0] as input, and read StatusFR by executing a CFC1 to UFR. helper_ctc1 has been extended with an additional parameter rt to check requirements for UFR feature. Definition of mips32r5-generic has been modified to include support for UFR. Signed-off-by: Petar Jovanovic <petar.jovanovic@imgtec.com> Reviewed-by: Eric Johnson <eric.johnson@imgtec.com>
Diffstat (limited to 'target-mips/helper.h')
-rw-r--r--target-mips/helper.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/target-mips/helper.h b/target-mips/helper.h
index b82f8e8e5a..8c7921a724 100644
--- a/target-mips/helper.h
+++ b/target-mips/helper.h
@@ -179,7 +179,7 @@ DEF_HELPER_2(yield, tl, env, tl)
/* CP1 functions */
DEF_HELPER_2(cfc1, tl, env, i32)
-DEF_HELPER_3(ctc1, void, env, tl, i32)
+DEF_HELPER_4(ctc1, void, env, tl, i32, i32)
DEF_HELPER_2(float_cvtd_s, i64, env, i32)
DEF_HELPER_2(float_cvtd_w, i64, env, i32)