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authorHervé Poussineau <hpoussin@reactos.org>2010-07-31 12:29:03 +0200
committerAurelien Jarno <aurelien@aurel32.net>2010-07-31 17:14:52 +0200
commit671b0f368bda45e6bcb7a86a6cd49bb90cce3e17 (patch)
treeceef4eb85d3fc229bbe0e74cacda1add2ea6344c /target-mips/op_helper.c
parentcf7c00d5c6b05c41856f6e957a52a9c34902c48c (diff)
downloadqemu-671b0f368bda45e6bcb7a86a6cd49bb90cce3e17.tar.gz
Correctly identify multiple cpus in SMP systems
Signed-off-by: Hervé Poussineau <hpoussin@reactos.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Diffstat (limited to 'target-mips/op_helper.c')
-rw-r--r--target-mips/op_helper.c3
1 files changed, 1 insertions, 2 deletions
diff --git a/target-mips/op_helper.c b/target-mips/op_helper.c
index a619b72610..50c65bdc3b 100644
--- a/target-mips/op_helper.c
+++ b/target-mips/op_helper.c
@@ -1359,8 +1359,7 @@ void helper_mtc0_cause (target_ulong arg1)
void helper_mtc0_ebase (target_ulong arg1)
{
/* vectored interrupts not implemented */
- /* Multi-CPU not implemented */
- env->CP0_EBase = 0x80000000 | (arg1 & 0x3FFFF000);
+ env->CP0_EBase = (env->CP0_EBase & ~0x3FFFF000) | (arg1 & 0x3FFFF000);
}
void helper_mtc0_config0 (target_ulong arg1)