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authoraurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162>2008-11-15 12:12:08 +0000
committeraurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162>2008-11-15 12:12:08 +0000
commitda80682b4220712d65af5ba041e2d7411d98d528 (patch)
tree725d82cd7edab5a4ef31fcef744910c9200d9de0 /target-mips/translate.c
parent64b4d28c38ccf69a468b90e8e45563ac947cd9b0 (diff)
downloadqemu-da80682b4220712d65af5ba041e2d7411d98d528.tar.gz
target-mips: avoid tcg internal error in mfc0/dmfc0
Set t0 to 0 for unimplemented mfc0/dmfc0 instructions. This fixes a tcg internal error while booting mips linux. Noticed by Julia Longtin. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5723 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-mips/translate.c')
-rw-r--r--target-mips/translate.c19
1 files changed, 11 insertions, 8 deletions
diff --git a/target-mips/translate.c b/target-mips/translate.c
index 386e0e37d1..cefccb01a2 100644
--- a/target-mips/translate.c
+++ b/target-mips/translate.c
@@ -3186,7 +3186,7 @@ static void gen_mfc0 (CPUState *env, DisasContext *ctx, TCGv t0, int reg, int se
}
break;
case 22:
- /* ignored */
+ tcg_gen_movi_tl(t0, 0); /* unimplemented */
rn = "'Diagnostic"; /* implementation dependent */
break;
case 23:
@@ -3266,12 +3266,13 @@ static void gen_mfc0 (CPUState *env, DisasContext *ctx, TCGv t0, int reg, int se
}
break;
case 26:
- rn = "ECC";
- break;
+ tcg_gen_movi_tl(t0, 0); /* unimplemented */
+ rn = "ECC";
+ break;
case 27:
switch (sel) {
- /* ignored */
case 0 ... 3:
+ tcg_gen_movi_tl(t0, 0); /* unimplemented */
rn = "CacheErr";
break;
default:
@@ -4372,7 +4373,7 @@ static void gen_dmfc0 (CPUState *env, DisasContext *ctx, TCGv t0, int reg, int s
}
break;
case 22:
- /* ignored */
+ tcg_gen_movi_tl(t0, 0); /* unimplemented */
rn = "'Diagnostic"; /* implementation dependent */
break;
case 23:
@@ -4451,12 +4452,14 @@ static void gen_dmfc0 (CPUState *env, DisasContext *ctx, TCGv t0, int reg, int s
}
break;
case 26:
- rn = "ECC";
- break;
+ tcg_gen_movi_tl(t0, 0); /* unimplemented */
+ rn = "ECC";
+ break;
case 27:
switch (sel) {
/* ignored */
case 0 ... 3:
+ tcg_gen_movi_tl(t0, 0); /* unimplemented */
rn = "CacheErr";
break;
default:
@@ -8013,7 +8016,7 @@ static void decode_opc (CPUState *env, DisasContext *ctx)
case OPC_EMT:
check_insn(env, ctx, ASE_MT);
tcg_gen_helper_1_1(do_emt, t0, t0);
- break;
+ break;
case OPC_DVPE:
check_insn(env, ctx, ASE_MT);
tcg_gen_helper_1_1(do_dvpe, t0, t0);