diff options
| author | ths <ths@c046a42c-6fe2-441c-8c8c-71466251a162> | 2008-06-27 10:02:35 +0000 |
|---|---|---|
| committer | ths <ths@c046a42c-6fe2-441c-8c8c-71466251a162> | 2008-06-27 10:02:35 +0000 |
| commit | b5dc7732e1cc2fb549e48b7b5d664f2c79628e2e (patch) | |
| tree | e18d7e7fc4e2fc9bad326022331c17c2800a8bbb /target-mips/translate_init.c | |
| parent | a37ee56cb7f2094a65fff14ed5d4ff325652b802 (diff) | |
| download | qemu-b5dc7732e1cc2fb549e48b7b5d664f2c79628e2e.tar.gz | |
More efficient target register / TC accesses.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4794 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-mips/translate_init.c')
| -rw-r--r-- | target-mips/translate_init.c | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/target-mips/translate_init.c b/target-mips/translate_init.c index d84bee01e9..b7d68cc281 100644 --- a/target-mips/translate_init.c +++ b/target-mips/translate_init.c @@ -546,8 +546,6 @@ static int cpu_mips_register (CPUMIPSState *env, const mips_def_t *def) env->CP0_TCStatus_rw_bitmask = def->CP0_TCStatus_rw_bitmask; env->CP0_SRSCtl = def->CP0_SRSCtl; env->current_tc = 0; - env->current_tc_gprs = &env->gpr[env->current_tc][0]; - env->current_tc_hi = &env->HI[env->current_tc][0]; env->SEGBITS = def->SEGBITS; env->SEGMask = (target_ulong)((1ULL << def->SEGBITS) - 1); #if defined(TARGET_MIPS64) |