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authorPaolo Bonzini <pbonzini@redhat.com>2012-12-17 18:19:49 +0100
committerPaolo Bonzini <pbonzini@redhat.com>2012-12-19 08:31:31 +0100
commit022c62cbbcf1ff40b23c92874f8670cddfec2414 (patch)
tree3ce0d762aec7ed41ecc486156cffcc0fbbd16d26 /target-mips
parent737e150e89c44c6b33691a627e24bac7fb58f349 (diff)
downloadqemu-022c62cbbcf1ff40b23c92874f8670cddfec2414.tar.gz
exec: move include files to include/exec/
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Diffstat (limited to 'target-mips')
-rw-r--r--target-mips/cpu.h6
-rw-r--r--target-mips/helper.h4
-rw-r--r--target-mips/op_helper.c10
-rw-r--r--target-mips/translate.c2
4 files changed, 11 insertions, 11 deletions
diff --git a/target-mips/cpu.h b/target-mips/cpu.h
index aebb2d5b79..183ba9fbd8 100644
--- a/target-mips/cpu.h
+++ b/target-mips/cpu.h
@@ -12,7 +12,7 @@
#include "config.h"
#include "qemu-common.h"
#include "mips-defs.h"
-#include "cpu-defs.h"
+#include "exec/cpu-defs.h"
#include "softfloat.h"
struct CPUMIPSState;
@@ -560,7 +560,7 @@ static inline int cpu_mips_hw_interrupts_pending(CPUMIPSState *env)
return r;
}
-#include "cpu-all.h"
+#include "exec/cpu-all.h"
/* Memory access type :
* may be needed for precise access rights control and precise exceptions.
@@ -738,7 +738,7 @@ static inline bool cpu_has_work(CPUState *cpu)
return has_work;
}
-#include "exec-all.h"
+#include "exec/exec-all.h"
static inline void cpu_pc_from_tb(CPUMIPSState *env, TranslationBlock *tb)
{
diff --git a/target-mips/helper.h b/target-mips/helper.h
index acf9ebd759..9ea60ec1bb 100644
--- a/target-mips/helper.h
+++ b/target-mips/helper.h
@@ -1,4 +1,4 @@
-#include "def-helper.h"
+#include "exec/def-helper.h"
DEF_HELPER_3(raise_exception_err, noreturn, env, i32, int)
DEF_HELPER_2(raise_exception, noreturn, env, i32)
@@ -707,4 +707,4 @@ DEF_HELPER_FLAGS_2(rddsp, 0, tl, tl, env)
-#include "def-helper.h"
+#include "exec/def-helper.h"
diff --git a/target-mips/op_helper.c b/target-mips/op_helper.c
index 2972ae3f0a..157f59e6bf 100644
--- a/target-mips/op_helper.c
+++ b/target-mips/op_helper.c
@@ -23,7 +23,7 @@
#include "helper.h"
#if !defined(CONFIG_USER_ONLY)
-#include "softmmu_exec.h"
+#include "exec/softmmu_exec.h"
#endif /* !defined(CONFIG_USER_ONLY) */
#ifndef CONFIG_USER_ONLY
@@ -2116,16 +2116,16 @@ static void QEMU_NORETURN do_unaligned_access(CPUMIPSState *env,
#define ALIGNED_ONLY
#define SHIFT 0
-#include "softmmu_template.h"
+#include "exec/softmmu_template.h"
#define SHIFT 1
-#include "softmmu_template.h"
+#include "exec/softmmu_template.h"
#define SHIFT 2
-#include "softmmu_template.h"
+#include "exec/softmmu_template.h"
#define SHIFT 3
-#include "softmmu_template.h"
+#include "exec/softmmu_template.h"
static void do_unaligned_access(CPUMIPSState *env, target_ulong addr,
int is_write, int is_user, uintptr_t retaddr)
diff --git a/target-mips/translate.c b/target-mips/translate.c
index 44e7617395..e81ff38476 100644
--- a/target-mips/translate.c
+++ b/target-mips/translate.c
@@ -1017,7 +1017,7 @@ static TCGv_i64 fpu_f64[32];
static uint32_t gen_opc_hflags[OPC_BUF_SIZE];
static target_ulong gen_opc_btarget[OPC_BUF_SIZE];
-#include "gen-icount.h"
+#include "exec/gen-icount.h"
#define gen_helper_0e0i(name, arg) do { \
TCGv_i32 helper_tmp = tcg_const_i32(arg); \