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| author | Andreas Färber <afaerber@suse.de> | 2013-06-29 04:18:45 +0200 |
|---|---|---|
| committer | Andreas Färber <afaerber@suse.de> | 2013-07-27 00:04:17 +0200 |
| commit | 5b50e790f9e9403d11b4164193b76530ee85a2a1 (patch) | |
| tree | 63244f49c1b53b05d1d8ddc795643e376dd55971 /target-mips | |
| parent | 986a2998932e978e63fc3b7ead1fef81f7aad52e (diff) | |
| download | qemu-5b50e790f9e9403d11b4164193b76530ee85a2a1.tar.gz | |
cpu: Introduce CPUClass::gdb_{read,write}_register()
Completes migration of target-specific code to new target-*/gdbstub.c.
Acked-by: Michael Walle <michael@walle.cc> (for lm32)
Acked-by: Max Filippov <jcmvbkbc@gmail.com> (for xtensa)
Signed-off-by: Andreas Färber <afaerber@suse.de>
Diffstat (limited to 'target-mips')
| -rw-r--r-- | target-mips/Makefile.objs | 1 | ||||
| -rw-r--r-- | target-mips/cpu-qom.h | 2 | ||||
| -rw-r--r-- | target-mips/cpu.c | 2 | ||||
| -rw-r--r-- | target-mips/gdbstub.c | 12 |
4 files changed, 15 insertions, 2 deletions
diff --git a/target-mips/Makefile.objs b/target-mips/Makefile.objs index 119c816518..0277d56e82 100644 --- a/target-mips/Makefile.objs +++ b/target-mips/Makefile.objs @@ -1,2 +1,3 @@ obj-y += translate.o dsp_helper.o op_helper.o lmi_helper.o helper.o cpu.o +obj-y += gdbstub.o obj-$(CONFIG_SOFTMMU) += machine.o diff --git a/target-mips/cpu-qom.h b/target-mips/cpu-qom.h index 7c8e616392..8877f813f7 100644 --- a/target-mips/cpu-qom.h +++ b/target-mips/cpu-qom.h @@ -78,5 +78,7 @@ void mips_cpu_do_interrupt(CPUState *cpu); void mips_cpu_dump_state(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf, int flags); hwaddr mips_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr); +int mips_cpu_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg); +int mips_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg); #endif diff --git a/target-mips/cpu.c b/target-mips/cpu.c index e667fb7b7c..f81f9e9409 100644 --- a/target-mips/cpu.c +++ b/target-mips/cpu.c @@ -100,6 +100,8 @@ static void mips_cpu_class_init(ObjectClass *c, void *data) cc->dump_state = mips_cpu_dump_state; cc->set_pc = mips_cpu_set_pc; cc->synchronize_from_tb = mips_cpu_synchronize_from_tb; + cc->gdb_read_register = mips_cpu_gdb_read_register; + cc->gdb_write_register = mips_cpu_gdb_write_register; #ifndef CONFIG_USER_ONLY cc->do_unassigned_access = mips_cpu_unassigned_access; cc->get_phys_page_debug = mips_cpu_get_phys_page_debug; diff --git a/target-mips/gdbstub.c b/target-mips/gdbstub.c index db826d8516..5b72d58a44 100644 --- a/target-mips/gdbstub.c +++ b/target-mips/gdbstub.c @@ -17,9 +17,15 @@ * You should have received a copy of the GNU Lesser General Public * License along with this library; if not, see <http://www.gnu.org/licenses/>. */ +#include "config.h" +#include "qemu-common.h" +#include "exec/gdbstub.h" -static int cpu_gdb_read_register(CPUMIPSState *env, uint8_t *mem_buf, int n) +int mips_cpu_gdb_read_register(CPUState *cs, uint8_t *mem_buf, int n) { + MIPSCPU *cpu = MIPS_CPU(cs); + CPUMIPSState *env = &cpu->env; + if (n < 32) { return gdb_get_regl(mem_buf, env->active_tc.gpr[n]); } @@ -78,8 +84,10 @@ static unsigned int ieee_rm[] = { set_float_rounding_mode(ieee_rm[env->active_fpu.fcr31 & 3], \ &env->active_fpu.fp_status) -static int cpu_gdb_write_register(CPUMIPSState *env, uint8_t *mem_buf, int n) +int mips_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n) { + MIPSCPU *cpu = MIPS_CPU(cs); + CPUMIPSState *env = &cpu->env; target_ulong tmp; tmp = ldtul_p(mem_buf); |