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authoraurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162>2008-11-11 11:34:39 +0000
committeraurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162>2008-11-11 11:34:39 +0000
commitadd69063e86c1dec66f285687c8bd923269c0c75 (patch)
tree1b509ef01c326b17a40e3fefd2f6ba99062d1838 /target-mips
parentc24135ffcc46ef1e02c69667f0b4156ebf7b86dd (diff)
downloadqemu-add69063e86c1dec66f285687c8bd923269c0c75.tar.gz
target-mips: fix mft* helpers/call
This patch attempts to fix mft* helpers and the associated TCG calls. mft* helpers do not take a register in argument, however: - some helpers are called with an argument while they do not take one. - some helpers are declared with an argument they don't use. Acked-by: Thiemo Seufer <ths@networkno.de> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5674 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-mips')
-rw-r--r--target-mips/helper.h10
-rw-r--r--target-mips/op_helper.c10
-rw-r--r--target-mips/translate.c48
3 files changed, 34 insertions, 34 deletions
diff --git a/target-mips/helper.h b/target-mips/helper.h
index ab62a1f6c9..525ccbbf6f 100644
--- a/target-mips/helper.h
+++ b/target-mips/helper.h
@@ -137,11 +137,11 @@ DEF_HELPER(void, do_mtc0_taghi, (target_ulong t0))
DEF_HELPER(void, do_mtc0_datahi, (target_ulong t0))
/* MIPS MT functions */
-DEF_HELPER(target_ulong, do_mftgpr, (target_ulong t0, uint32_t sel))
-DEF_HELPER(target_ulong, do_mftlo, (target_ulong t0, uint32_t sel))
-DEF_HELPER(target_ulong, do_mfthi, (target_ulong t0, uint32_t sel))
-DEF_HELPER(target_ulong, do_mftacx, (target_ulong t0, uint32_t sel))
-DEF_HELPER(target_ulong, do_mftdsp, (target_ulong t0))
+DEF_HELPER(target_ulong, do_mftgpr, (uint32_t sel))
+DEF_HELPER(target_ulong, do_mftlo, (uint32_t sel))
+DEF_HELPER(target_ulong, do_mfthi, (uint32_t sel))
+DEF_HELPER(target_ulong, do_mftacx, (uint32_t sel))
+DEF_HELPER(target_ulong, do_mftdsp, (void))
DEF_HELPER(void, do_mttgpr, (target_ulong t0, uint32_t sel))
DEF_HELPER(void, do_mttlo, (target_ulong t0, uint32_t sel))
DEF_HELPER(void, do_mtthi, (target_ulong t0, uint32_t sel))
diff --git a/target-mips/op_helper.c b/target-mips/op_helper.c
index 9e9c42581b..37447282e8 100644
--- a/target-mips/op_helper.c
+++ b/target-mips/op_helper.c
@@ -1358,7 +1358,7 @@ void do_mtc0_status_irqraise_debug(void)
#endif /* !CONFIG_USER_ONLY */
/* MIPS MT functions */
-target_ulong do_mftgpr(target_ulong t0, uint32_t sel)
+target_ulong do_mftgpr(uint32_t sel)
{
int other_tc = env->CP0_VPEControl & (0xff << CP0VPECo_TargTC);
@@ -1368,7 +1368,7 @@ target_ulong do_mftgpr(target_ulong t0, uint32_t sel)
return env->tcs[other_tc].gpr[sel];
}
-target_ulong do_mftlo(target_ulong t0, uint32_t sel)
+target_ulong do_mftlo(uint32_t sel)
{
int other_tc = env->CP0_VPEControl & (0xff << CP0VPECo_TargTC);
@@ -1378,7 +1378,7 @@ target_ulong do_mftlo(target_ulong t0, uint32_t sel)
return env->tcs[other_tc].LO[sel];
}
-target_ulong do_mfthi(target_ulong t0, uint32_t sel)
+target_ulong do_mfthi(uint32_t sel)
{
int other_tc = env->CP0_VPEControl & (0xff << CP0VPECo_TargTC);
@@ -1388,7 +1388,7 @@ target_ulong do_mfthi(target_ulong t0, uint32_t sel)
return env->tcs[other_tc].HI[sel];
}
-target_ulong do_mftacx(target_ulong t0, uint32_t sel)
+target_ulong do_mftacx(uint32_t sel)
{
int other_tc = env->CP0_VPEControl & (0xff << CP0VPECo_TargTC);
@@ -1398,7 +1398,7 @@ target_ulong do_mftacx(target_ulong t0, uint32_t sel)
return env->tcs[other_tc].ACX[sel];
}
-target_ulong do_mftdsp(target_ulong t0)
+target_ulong do_mftdsp(void)
{
int other_tc = env->CP0_VPEControl & (0xff << CP0VPECo_TargTC);
diff --git a/target-mips/translate.c b/target-mips/translate.c
index 9e7335b5f7..6ffc635b40 100644
--- a/target-mips/translate.c
+++ b/target-mips/translate.c
@@ -5179,25 +5179,25 @@ static void gen_mftr(CPUState *env, DisasContext *ctx, int rt, int rd,
case 2:
switch (sel) {
case 1:
- tcg_gen_helper_1_1(do_mftc0_tcstatus, t0, t0);
+ tcg_gen_helper_1_0(do_mftc0_tcstatus, t0);
break;
case 2:
- tcg_gen_helper_1_1(do_mftc0_tcbind, t0, t0);
+ tcg_gen_helper_1_0(do_mftc0_tcbind, t0);
break;
case 3:
- tcg_gen_helper_1_1(do_mftc0_tcrestart, t0, t0);
+ tcg_gen_helper_1_0(do_mftc0_tcrestart, t0);
break;
case 4:
- tcg_gen_helper_1_1(do_mftc0_tchalt, t0, t0);
+ tcg_gen_helper_1_0(do_mftc0_tchalt, t0);
break;
case 5:
- tcg_gen_helper_1_1(do_mftc0_tccontext, t0, t0);
+ tcg_gen_helper_1_0(do_mftc0_tccontext, t0);
break;
case 6:
- tcg_gen_helper_1_1(do_mftc0_tcschedule, t0, t0);
+ tcg_gen_helper_1_0(do_mftc0_tcschedule, t0);
break;
case 7:
- tcg_gen_helper_1_1(do_mftc0_tcschefback, t0, t0);
+ tcg_gen_helper_1_0(do_mftc0_tcschefback, t0);
break;
default:
gen_mfc0(env, ctx, t0, rt, sel);
@@ -5207,7 +5207,7 @@ static void gen_mftr(CPUState *env, DisasContext *ctx, int rt, int rd,
case 10:
switch (sel) {
case 0:
- tcg_gen_helper_1_1(do_mftc0_entryhi, t0, t0);
+ tcg_gen_helper_1_0(do_mftc0_entryhi, t0);
break;
default:
gen_mfc0(env, ctx, t0, rt, sel);
@@ -5216,7 +5216,7 @@ static void gen_mftr(CPUState *env, DisasContext *ctx, int rt, int rd,
case 12:
switch (sel) {
case 0:
- tcg_gen_helper_1_1(do_mftc0_status, t0, t0);
+ tcg_gen_helper_1_0(do_mftc0_status, t0);
break;
default:
gen_mfc0(env, ctx, t0, rt, sel);
@@ -5225,7 +5225,7 @@ static void gen_mftr(CPUState *env, DisasContext *ctx, int rt, int rd,
case 23:
switch (sel) {
case 0:
- tcg_gen_helper_1_1(do_mftc0_debug, t0, t0);
+ tcg_gen_helper_1_0(do_mftc0_debug, t0);
break;
default:
gen_mfc0(env, ctx, t0, rt, sel);
@@ -5238,49 +5238,49 @@ static void gen_mftr(CPUState *env, DisasContext *ctx, int rt, int rd,
} else switch (sel) {
/* GPR registers. */
case 0:
- tcg_gen_helper_1_1i(do_mftgpr, t0, t0, rt);
+ tcg_gen_helper_1_i(do_mftgpr, t0, rt);
break;
/* Auxiliary CPU registers */
case 1:
switch (rt) {
case 0:
- tcg_gen_helper_1_1i(do_mftlo, t0, t0, 0);
+ tcg_gen_helper_1_i(do_mftlo, t0, 0);
break;
case 1:
- tcg_gen_helper_1_1i(do_mfthi, t0, t0, 0);
+ tcg_gen_helper_1_i(do_mfthi, t0, 0);
break;
case 2:
- tcg_gen_helper_1_1i(do_mftacx, t0, t0, 0);
+ tcg_gen_helper_1_i(do_mftacx, t0, 0);
break;
case 4:
- tcg_gen_helper_1_1i(do_mftlo, t0, t0, 1);
+ tcg_gen_helper_1_i(do_mftlo, t0, 1);
break;
case 5:
- tcg_gen_helper_1_1i(do_mfthi, t0, t0, 1);
+ tcg_gen_helper_1_i(do_mfthi, t0, 1);
break;
case 6:
- tcg_gen_helper_1_1i(do_mftacx, t0, t0, 1);
+ tcg_gen_helper_1_i(do_mftacx, t0, 1);
break;
case 8:
- tcg_gen_helper_1_1i(do_mftlo, t0, t0, 2);
+ tcg_gen_helper_1_i(do_mftlo, t0, 2);
break;
case 9:
- tcg_gen_helper_1_1i(do_mfthi, t0, t0, 2);
+ tcg_gen_helper_1_i(do_mfthi, t0, 2);
break;
case 10:
- tcg_gen_helper_1_1i(do_mftacx, t0, t0, 2);
+ tcg_gen_helper_1_i(do_mftacx, t0, 2);
break;
case 12:
- tcg_gen_helper_1_1i(do_mftlo, t0, t0, 3);
+ tcg_gen_helper_1_i(do_mftlo, t0, 3);
break;
case 13:
- tcg_gen_helper_1_1i(do_mfthi, t0, t0, 3);
+ tcg_gen_helper_1_i(do_mfthi, t0, 3);
break;
case 14:
- tcg_gen_helper_1_1i(do_mftacx, t0, t0, 3);
+ tcg_gen_helper_1_i(do_mftacx, t0, 3);
break;
case 16:
- tcg_gen_helper_1_1(do_mftdsp, t0, t0);
+ tcg_gen_helper_1_0(do_mftdsp, t0);
break;
default:
goto die;