diff options
| author | ths <ths@c046a42c-6fe2-441c-8c8c-71466251a162> | 2006-12-06 17:48:52 +0000 |
|---|---|---|
| committer | ths <ths@c046a42c-6fe2-441c-8c8c-71466251a162> | 2006-12-06 17:48:52 +0000 |
| commit | 6ae817752b72a7c9c3bb031afa7e7cc0e4d10eaf (patch) | |
| tree | 9cdae3b72e3f10f5ba93c929f82b76c78468fe8d /target-mips | |
| parent | 814b9a47490c4500fd105b524b8354764e6655e5 (diff) | |
| download | qemu-6ae817752b72a7c9c3bb031afa7e7cc0e4d10eaf.tar.gz | |
Halt/reboot support for Linux, by Daniel Jacobowitz. This is a band-aid
until we emulate real MIPS hardware with real firmware.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2221 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-mips')
| -rw-r--r-- | target-mips/cpu.h | 8 | ||||
| -rw-r--r-- | target-mips/translate.c | 10 |
2 files changed, 16 insertions, 2 deletions
diff --git a/target-mips/cpu.h b/target-mips/cpu.h index 3ade7bce64..3ac2131a5d 100644 --- a/target-mips/cpu.h +++ b/target-mips/cpu.h @@ -182,7 +182,6 @@ struct CPUMIPSState { uint32_t CP0_ErrorEPC; uint32_t CP0_DESAVE; /* Qemu */ - struct QEMUTimer *timer; /* Internal timer */ int interrupt_request; jmp_buf jmp_env; int exception_index; @@ -213,6 +212,13 @@ struct CPUMIPSState { int halted; /* TRUE if the CPU is in suspend state */ CPU_COMMON + + int ram_size; + const char *kernel_filename; + const char *kernel_cmdline; + const char *initrd_filename; + + struct QEMUTimer *timer; /* Internal timer */ }; #include "cpu-all.h" diff --git a/target-mips/translate.c b/target-mips/translate.c index 0d624185f8..07725b3445 100644 --- a/target-mips/translate.c +++ b/target-mips/translate.c @@ -2425,7 +2425,16 @@ CPUMIPSState *cpu_mips_init (void) if (!env) return NULL; cpu_exec_init(env); + cpu_reset(env); + return env; +} + +void cpu_reset (CPUMIPSState *env) +{ + memset(env, 0, offsetof(CPUMIPSState, breakpoints)); + tlb_flush(env, 1); + /* Minimal init */ env->PC = 0xBFC00000; #if defined (MIPS_USES_R4K_TLB) @@ -2456,5 +2465,4 @@ CPUMIPSState *cpu_mips_init (void) #ifdef MIPS_USES_FPU env->fcr0 = MIPS_FCR0; #endif - return env; } |