summaryrefslogtreecommitdiff
path: root/target-openrisc/gdbstub.c
diff options
context:
space:
mode:
authorAndreas Färber <afaerber@suse.de>2013-06-29 04:18:45 +0200
committerAndreas Färber <afaerber@suse.de>2013-07-27 00:04:17 +0200
commit5b50e790f9e9403d11b4164193b76530ee85a2a1 (patch)
tree63244f49c1b53b05d1d8ddc795643e376dd55971 /target-openrisc/gdbstub.c
parent986a2998932e978e63fc3b7ead1fef81f7aad52e (diff)
downloadqemu-5b50e790f9e9403d11b4164193b76530ee85a2a1.tar.gz
cpu: Introduce CPUClass::gdb_{read,write}_register()
Completes migration of target-specific code to new target-*/gdbstub.c. Acked-by: Michael Walle <michael@walle.cc> (for lm32) Acked-by: Max Filippov <jcmvbkbc@gmail.com> (for xtensa) Signed-off-by: Andreas Färber <afaerber@suse.de>
Diffstat (limited to 'target-openrisc/gdbstub.c')
-rw-r--r--target-openrisc/gdbstub.c16
1 files changed, 11 insertions, 5 deletions
diff --git a/target-openrisc/gdbstub.c b/target-openrisc/gdbstub.c
index bdb8d2c73f..18bcc46167 100644
--- a/target-openrisc/gdbstub.c
+++ b/target-openrisc/gdbstub.c
@@ -17,9 +17,15 @@
* You should have received a copy of the GNU Lesser General Public
* License along with this library; if not, see <http://www.gnu.org/licenses/>.
*/
+#include "config.h"
+#include "qemu-common.h"
+#include "exec/gdbstub.h"
-static int cpu_gdb_read_register(CPUOpenRISCState *env, uint8_t *mem_buf, int n)
+int openrisc_cpu_gdb_read_register(CPUState *cs, uint8_t *mem_buf, int n)
{
+ OpenRISCCPU *cpu = OPENRISC_CPU(cs);
+ CPUOpenRISCState *env = &cpu->env;
+
if (n < 32) {
return gdb_get_reg32(mem_buf, env->gpr[n]);
} else {
@@ -40,11 +46,11 @@ static int cpu_gdb_read_register(CPUOpenRISCState *env, uint8_t *mem_buf, int n)
return 0;
}
-static int cpu_gdb_write_register(CPUOpenRISCState *env,
- uint8_t *mem_buf, int n)
+int openrisc_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n)
{
- OpenRISCCPU *cpu = openrisc_env_get_cpu(env);
- CPUClass *cc = CPU_GET_CLASS(cpu);
+ OpenRISCCPU *cpu = OPENRISC_CPU(cs);
+ CPUClass *cc = CPU_GET_CLASS(cs);
+ CPUOpenRISCState *env = &cpu->env;
uint32_t tmp;
if (n > cc->gdb_num_core_regs) {