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| author | Andreas Färber <afaerber@suse.de> | 2013-06-29 18:55:54 +0200 |
|---|---|---|
| committer | Andreas Färber <afaerber@suse.de> | 2013-07-23 02:41:33 +0200 |
| commit | 00b941e581b5c42645f836ef530705bb76a3e6bb (patch) | |
| tree | 4c291f0999809416681f06f575b8ec1288744c2d /target-openrisc/mmu.c | |
| parent | 385b9f0e4d8c60037c937edd7a3735fff7570429 (diff) | |
| download | qemu-00b941e581b5c42645f836ef530705bb76a3e6bb.tar.gz | |
cpu: Turn cpu_get_phys_page_debug() into a CPUClass hook
Change breakpoint_invalidate() argument to CPUState alongside.
Since all targets now assign a softmmu-only field, we can drop helpers
cpu_class_set_{do_unassigned_access,vmsd}() and device_class_set_vmsd().
Prepares for changing cpu_memory_rw_debug() argument to CPUState.
Acked-by: Max Filippov <jcmvbkbc@gmail.com> (for xtensa)
Signed-off-by: Andreas Färber <afaerber@suse.de>
Diffstat (limited to 'target-openrisc/mmu.c')
| -rw-r--r-- | target-openrisc/mmu.c | 5 |
1 files changed, 2 insertions, 3 deletions
diff --git a/target-openrisc/mmu.c b/target-openrisc/mmu.c index d354e1f8b2..57f5616e9c 100644 --- a/target-openrisc/mmu.c +++ b/target-openrisc/mmu.c @@ -219,12 +219,11 @@ int cpu_openrisc_handle_mmu_fault(CPUOpenRISCState *env, #endif #ifndef CONFIG_USER_ONLY -hwaddr cpu_get_phys_page_debug(CPUOpenRISCState *env, - target_ulong addr) +hwaddr openrisc_cpu_get_phys_page_debug(CPUState *cs, vaddr addr) { + OpenRISCCPU *cpu = OPENRISC_CPU(cs); hwaddr phys_addr; int prot; - OpenRISCCPU *cpu = openrisc_env_get_cpu(env); if (cpu_openrisc_get_phys_addr(cpu, &phys_addr, &prot, addr, 0)) { return -1; |