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authorSebastian Macke <sebastian@macke.de>2013-10-03 16:16:14 +0800
committerJia Liu <proljc@gmail.com>2013-10-03 16:24:44 +0800
commit6ef8263ead779e1eecfaf1e0388f4c3941ea7ec3 (patch)
tree6753504b6a0bce779d580aae4b4ffc4b3ca2b37f /target-openrisc
parentbf961b52785061e1802214c9e03a1c65b261f7c1 (diff)
downloadqemu-6ef8263ead779e1eecfaf1e0388f4c3941ea7ec3.tar.gz
target-openrisc: Removes a non-conforming behavior for the first page of the memory
Where *software* leaves 0x0000 - 0x2000 unmapped, the hardware should still allow for this area to be mapped. Signed-off-by: Sebastian Macke <sebastian@macke.de> Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi> Reviewed-by: Jia Liu <proljc@gmail.com>
Diffstat (limited to 'target-openrisc')
-rw-r--r--target-openrisc/mmu.c7
1 files changed, 0 insertions, 7 deletions
diff --git a/target-openrisc/mmu.c b/target-openrisc/mmu.c
index 323a173a82..22d7cbec18 100644
--- a/target-openrisc/mmu.c
+++ b/target-openrisc/mmu.c
@@ -122,13 +122,6 @@ static int cpu_openrisc_get_phys_addr(OpenRISCCPU *cpu,
{
int ret = TLBRET_MATCH;
- /* [0x0000--0x2000]: unmapped */
- if (address < 0x2000 && (cpu->env.sr & SR_SM)) {
- *physical = address;
- *prot = PAGE_READ | PAGE_WRITE;
- return ret;
- }
-
if (rw == 2) { /* ITLB */
*physical = 0;
ret = cpu->env.tlb->cpu_openrisc_map_address_code(cpu, physical,