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| author | Alexey Kardashevskiy <aik@ozlabs.ru> | 2014-05-23 12:26:50 +1000 |
|---|---|---|
| committer | Alexander Graf <agraf@suse.de> | 2014-06-16 13:24:37 +0200 |
| commit | 8dfa3a5e85eca94a93b1495136f49c5776fd5ada (patch) | |
| tree | 7726147b23a12b6653e98e5b4d86ec52205f679b /target-ppc/cpu-models.h | |
| parent | af354f19a9b6a655eac1c49b66d3be021e7ed3d9 (diff) | |
| download | qemu-8dfa3a5e85eca94a93b1495136f49c5776fd5ada.tar.gz | |
target-ppc: Add "compat" CPU option
PowerISA defines a compatibility mode for server POWERPC CPUs which
is supported by the PCR special register which is hypervisor privileged.
To support this mode for guests, SPAPR defines a set of virtual PVRs,
one per PowerISA spec version. When a hypervisor needs a guest to work in
a compatibility mode, it puts a virtual PVR value into @cpu-version
property of a CPU node.
This introduces a "compat" CPU option which defines maximal compatibility
mode enabled. The supported modes are power6/power7/power8.
This does not change the existing behaviour, new property will be used
by next patches.
Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>
Signed-off-by: Alexander Graf <agraf@suse.de>
Diffstat (limited to 'target-ppc/cpu-models.h')
| -rw-r--r-- | target-ppc/cpu-models.h | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/target-ppc/cpu-models.h b/target-ppc/cpu-models.h index 9a003b43b4..db75896012 100644 --- a/target-ppc/cpu-models.h +++ b/target-ppc/cpu-models.h @@ -595,6 +595,16 @@ enum { CPU_POWERPC_PA6T = 0x00900000, }; +/* Logical PVR definitions for sPAPR */ +enum { + CPU_POWERPC_LOGICAL_2_04 = 0x0F000001, + CPU_POWERPC_LOGICAL_2_05 = 0x0F000002, + CPU_POWERPC_LOGICAL_2_06 = 0x0F000003, + CPU_POWERPC_LOGICAL_2_06_PLUS = 0x0F100003, + CPU_POWERPC_LOGICAL_2_07 = 0x0F000004, + CPU_POWERPC_LOGICAL_2_08 = 0x0F000005, +}; + /* System version register (used on MPC 8xxx) */ enum { POWERPC_SVR_NONE = 0x00000000, |