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authorAndreas Färber <afaerber@suse.de>2013-02-17 23:16:41 +0000
committerAlexander Graf <agraf@suse.de>2013-03-08 21:04:51 +0100
commitcfe34f44b3a13ed32891e0b3c84be91d3d91a4b8 (patch)
treecff183f9a5131a984f42a359f1dab7090f6efdc3 /target-ppc/cpu-qom.h
parentde400129daf3ff0f7468363f6d886fcdcc626ea6 (diff)
downloadqemu-cfe34f44b3a13ed32891e0b3c84be91d3d91a4b8.tar.gz
target-ppc: Convert CPU definitions
Turn the array of model definitions into a set of self-registering QOM types with their own class_init. Unique identifiers are obtained from the combination of PVR, SVR and family identifiers; this requires all alias #defines to be removed from the list. Possibly there are some more left after this commit that are not currently being compiled. Prepares for introducing abstract intermediate CPU types for families. Keep the right-aligned macro line breaks within 78 chars to aid three-way merges. Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
Diffstat (limited to 'target-ppc/cpu-qom.h')
-rw-r--r--target-ppc/cpu-qom.h17
1 files changed, 15 insertions, 2 deletions
diff --git a/target-ppc/cpu-qom.h b/target-ppc/cpu-qom.h
index 4e8ceca574..2bf0ab62d4 100644
--- a/target-ppc/cpu-qom.h
+++ b/target-ppc/cpu-qom.h
@@ -53,8 +53,21 @@ typedef struct PowerPCCPUClass {
DeviceRealize parent_realize;
void (*parent_reset)(CPUState *cpu);
- /* TODO inline fields here */
- ppc_def_t *info;
+ uint32_t pvr;
+ uint32_t svr;
+ uint64_t insns_flags;
+ uint64_t insns_flags2;
+ uint64_t msr_mask;
+ powerpc_mmu_t mmu_model;
+ powerpc_excp_t excp_model;
+ powerpc_input_t bus_model;
+ uint32_t flags;
+ int bfd_mach;
+#if defined(TARGET_PPC64)
+ const struct ppc_segment_page_sizes *sps;
+#endif
+ void (*init_proc)(CPUPPCState *env);
+ int (*check_pow)(CPUPPCState *env);
} PowerPCCPUClass;
/**