summaryrefslogtreecommitdiff
path: root/target-ppc/cpu.h
diff options
context:
space:
mode:
authorAlexey Kardashevskiy <aik@ozlabs.ru>2013-12-20 17:41:32 +1100
committerAlexander Graf <agraf@suse.de>2014-03-05 03:06:23 +0100
commit0bfe9299dae5c92498a4f503e6d5786bdbc7c4d7 (patch)
treeeca133f1e5fd9a05940c4ae16c2c0d774505d484 /target-ppc/cpu.h
parent81d2fb4dfdf34889676410ff61753b351e3d67fb (diff)
downloadqemu-0bfe9299dae5c92498a4f503e6d5786bdbc7c4d7.tar.gz
target-ppc: fix SPR_CTRL/SPR_UCTRL register numbers
Assuming that "U" in SPR_UCTRL is for "user", there is inconsistency with 970 user manuals/P5-bookIV/PowerISA204 which define the number as: priviledged # spr5-9 spr0-4 name mtspr mfspr len cat 136 00100 01000 CTRL - no 32 S 152 00100 11000 CTRL yes - 32 S This swaps the numbers. No effect from this change is expected though. Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru> Signed-off-by: Alexander Graf <agraf@suse.de>
Diffstat (limited to 'target-ppc/cpu.h')
-rw-r--r--target-ppc/cpu.h4
1 files changed, 2 insertions, 2 deletions
diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h
index 4369e7cc38..51bcd4a14d 100644
--- a/target-ppc/cpu.h
+++ b/target-ppc/cpu.h
@@ -1250,7 +1250,7 @@ static inline int cpu_mmu_index (CPUPPCState *env)
#define SPR_MPC_EIE (0x050)
#define SPR_MPC_EID (0x051)
#define SPR_MPC_NRI (0x052)
-#define SPR_CTRL (0x088)
+#define SPR_UCTRL (0x088)
#define SPR_MPC_CMPA (0x090)
#define SPR_MPC_CMPB (0x091)
#define SPR_MPC_CMPC (0x092)
@@ -1259,7 +1259,7 @@ static inline int cpu_mmu_index (CPUPPCState *env)
#define SPR_MPC_DER (0x095)
#define SPR_MPC_COUNTA (0x096)
#define SPR_MPC_COUNTB (0x097)
-#define SPR_UCTRL (0x098)
+#define SPR_CTRL (0x098)
#define SPR_MPC_CMPE (0x098)
#define SPR_MPC_CMPF (0x099)
#define SPR_MPC_CMPG (0x09A)