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| author | Tom Musta <tommusta@gmail.com> | 2014-02-10 11:26:54 -0600 |
|---|---|---|
| committer | Alexander Graf <agraf@suse.de> | 2014-03-05 03:06:49 +0100 |
| commit | 60511041d6b846c9b6804a2c552ceda27d4e1f06 (patch) | |
| tree | 0ee7649325375e5bd5319f9e9dfffc5cb61005bf /target-ppc/cpu.h | |
| parent | 94840e0700a3cbd0b0d99ae9ddecf47b4bbcc5d7 (diff) | |
| download | qemu-60511041d6b846c9b6804a2c552ceda27d4e1f06.tar.gz | |
target-ppc: Add Target Address SPR (TAR) to Power8
This patch adds support for the Target Address Register (TAR) to the Power8
model.
Because supported SPRs are typically identified in an init_proc_*()
function and because the Power8 model is currently just using the
init_proc_POWER7() function, a new init_proc_POWER8() function
is added and plugged into the P8 model.
Signed-off-by: Tom Musta <tommusta@gmail.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
Diffstat (limited to 'target-ppc/cpu.h')
| -rw-r--r-- | target-ppc/cpu.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h index 9a40d209bb..d02fd0425e 100644 --- a/target-ppc/cpu.h +++ b/target-ppc/cpu.h @@ -1508,6 +1508,7 @@ static inline int cpu_mmu_index (CPUPPCState *env) #define SPR_RCPU_L2U_RA2 (0x32A) #define SPR_MPC_MD_DBRAM1 (0x32A) #define SPR_RCPU_L2U_RA3 (0x32B) +#define SPR_TAR (0x32F) #define SPR_440_INV0 (0x370) #define SPR_440_INV1 (0x371) #define SPR_440_INV2 (0x372) |