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| author | Tom Musta <tommusta@gmail.com> | 2014-02-10 11:27:00 -0600 |
|---|---|---|
| committer | Alexander Graf <agraf@suse.de> | 2014-03-05 03:06:50 +0100 |
| commit | 9c294d5ab3eac0e600fa510becfa677d87b088bf (patch) | |
| tree | 28c3b03f38c460847904541b3ab2c88116efb59a /target-ppc/cpu.h | |
| parent | 84cab1e2f5be3ea6eaa65c9fc0422fb992946ce0 (diff) | |
| download | qemu-9c294d5ab3eac0e600fa510becfa677d87b088bf.tar.gz | |
target-ppc: Add Load Quadword and Reserve
This patch adds the Load Quadword and Reserve (lqarx) instruction,
which is new in Power ISA 2.07.
Signed-off-by: Tom Musta <tommusta@gmail.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
Diffstat (limited to 'target-ppc/cpu.h')
| -rw-r--r-- | target-ppc/cpu.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h index 365627b3b1..7cf725551f 100644 --- a/target-ppc/cpu.h +++ b/target-ppc/cpu.h @@ -926,6 +926,7 @@ struct CPUPPCState { target_ulong reserve_addr; /* Reservation value */ target_ulong reserve_val; + target_ulong reserve_val2; /* Reservation store address */ target_ulong reserve_ea; /* Reserved store source register and size */ |