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authorDavid Gibson <david@gibson.dropbear.id.au>2013-02-20 16:41:50 +0000
committerAlexander Graf <agraf@suse.de>2013-03-08 21:04:52 +0100
commitd67d40ea07577b0a952d3bea5a2f92edf0ee26a6 (patch)
tree249519be3d12545626543d003678fa1b503e088b /target-ppc/cpu.h
parentd60fa42e8bae39440f997ebfe8fe328269a57d16 (diff)
downloadqemu-d67d40ea07577b0a952d3bea5a2f92edf0ee26a6.tar.gz
target-ppc: Add mechanism for synchronizing SPRs with KVM
Currently when runing under KVM on ppc, we synchronize a certain number of vital SPRs to KVM through the SET_SREGS call. This leaves out quite a lot of important SPRs which are maintained in KVM. It would be helpful to have their contents in qemu for debugging purposes, and when we implement migration it will be vital, since they include important guest state that will need to be restored on the target. This patch sets up for synchronization of any registers supported by the KVM ONE_REG calls. A new variant on spr_register() allows a ONE_REG id to be stored with the SPR information. When we set/get information to KVM we also synchronize any SPRs so registered. For now we set this mechanism up to synchronize a handful of important registers that already have ONE_REG IDs, notably the DAR and DSISR. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Alexander Graf <agraf@suse.de>
Diffstat (limited to 'target-ppc/cpu.h')
-rw-r--r--target-ppc/cpu.h6
1 files changed, 6 insertions, 0 deletions
diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h
index e4cf96ce2f..417abb0dd1 100644
--- a/target-ppc/cpu.h
+++ b/target-ppc/cpu.h
@@ -329,6 +329,12 @@ struct ppc_spr_t {
void (*hea_write)(void *opaque, int spr_num, int gpr_num);
#endif
const char *name;
+#ifdef CONFIG_KVM
+ /* We (ab)use the fact that all the SPRs will have ids for the
+ * ONE_REG interface will have KVM_REG_PPC to use 0 as meaning,
+ * don't sync this */
+ uint64_t one_reg_id;
+#endif
};
/* Altivec registers (128 bits) */