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authorBlue Swirl <blauwirbel@gmail.com>2009-04-28 18:00:30 +0000
committerBlue Swirl <blauwirbel@gmail.com>2009-04-28 18:00:30 +0000
commitfc1c67bc2a43a53f7315b602e0c67f9604835fe1 (patch)
tree7cf6cdba51aced0a6e623a984e6bb8ea7fe67330 /target-ppc/cpu.h
parentefcfd0c5d953722d89ae343d4bf2a9fd326775fa (diff)
downloadqemu-fc1c67bc2a43a53f7315b602e0c67f9604835fe1.tar.gz
Fix PPC reset
Diffstat (limited to 'target-ppc/cpu.h')
-rw-r--r--target-ppc/cpu.h3
1 files changed, 2 insertions, 1 deletions
diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h
index 87b34600ed..0e8b49ffe2 100644
--- a/target-ppc/cpu.h
+++ b/target-ppc/cpu.h
@@ -654,6 +654,7 @@ struct CPUPPCState {
/* Exception vectors */
target_ulong excp_vectors[POWERPC_EXCP_NB];
target_ulong excp_prefix;
+ target_ulong hreset_excp_prefix;
target_ulong ivor_mask;
target_ulong ivpr_mask;
target_ulong hreset_vector;
@@ -802,7 +803,7 @@ int ppc_dcr_write (ppc_dcr_t *dcr_env, int dcrn, target_ulong val);
#define cpu_signal_handler cpu_ppc_signal_handler
#define cpu_list ppc_cpu_list
-#define CPU_SAVE_VERSION 3
+#define CPU_SAVE_VERSION 4
/* MMU modes definitions */
#define MMU_MODE0_SUFFIX _user