diff options
| author | Nathan Froyd <froydnj@codesourcery.com> | 2009-08-03 08:43:26 -0700 |
|---|---|---|
| committer | malc <av1474@comtv.ru> | 2009-08-03 20:33:41 +0400 |
| commit | 4425265beb8503b82dc3de0388b504e15825d06e (patch) | |
| tree | 25ad23be765cec59d5ac80d2397523d894dd370f /target-ppc/cpu.h | |
| parent | 18b21a2f83a26c3d6a9e7f0bdc4e8eb2b177e8f6 (diff) | |
| download | qemu-4425265beb8503b82dc3de0388b504e15825d06e.tar.gz | |
target-ppc: add exceptions for conditional stores
Signed-off-by: Nathan Froyd <froydnj@codesourcery.com>
Signed-off-by: malc <av1474@comtv.ru>
Diffstat (limited to 'target-ppc/cpu.h')
| -rw-r--r-- | target-ppc/cpu.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h index 7935fcd18d..8c1029e6f9 100644 --- a/target-ppc/cpu.h +++ b/target-ppc/cpu.h @@ -218,6 +218,7 @@ enum { /* Qemu exceptions: special cases we want to stop translation */ POWERPC_EXCP_SYNC = 0x202, /* context synchronizing instruction */ POWERPC_EXCP_SYSCALL_USER = 0x203, /* System call in user mode only */ + POWERPC_EXCP_STCX = 0x204 /* Conditional stores in user mode */ }; /* Exceptions error codes */ @@ -564,6 +565,10 @@ struct CPUPPCState { target_ulong reserve_addr; /* Reservation value */ target_ulong reserve_val; + /* Reservation store address */ + target_ulong reserve_ea; + /* Reserved store source register and size */ + target_ulong reserve_info; /* Those ones are used in supervisor mode only */ /* machine state register */ |