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authorThomas Huth <thuth@redhat.com>2016-06-07 17:39:37 +0200
committerDavid Gibson <david@gibson.dropbear.id.au>2016-06-14 10:41:38 +1000
commit8cd2ce7aaa3c3fadc561f40045d4d53ff72e94ef (patch)
tree203bffc0130f11a4093594dcc2afca67edb23ede /target-ppc/cpu.h
parent7386ae6372cc07c77a39cb3aa185848b43f7ae34 (diff)
downloadqemu-8cd2ce7aaa3c3fadc561f40045d4d53ff72e94ef.tar.gz
ppc: Split pcr_mask settings into supported bits and the register mask
The current pcr_mask values are ambiguous: Should these be the mask that defines valid bits in the PCR register? Or should these rather indicate which compatibility levels are possible? Anyway, POWER6 and POWER7 should certainly not use the same values here. So let's introduce an additional variable "pcr_supported" here which is used to indicate the valid compatibility levels, and use pcr_mask to signal the valid bits in the PCR register. Signed-off-by: Thomas Huth <thuth@redhat.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Diffstat (limited to 'target-ppc/cpu.h')
-rw-r--r--target-ppc/cpu.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h
index cb8b9122f3..9087a08002 100644
--- a/target-ppc/cpu.h
+++ b/target-ppc/cpu.h
@@ -2200,6 +2200,7 @@ enum {
enum {
PCR_COMPAT_2_05 = 1ull << (63-62),
PCR_COMPAT_2_06 = 1ull << (63-61),
+ PCR_COMPAT_2_07 = 1ull << (63-60),
PCR_VEC_DIS = 1ull << (63-0), /* Vec. disable (bit NA since POWER8) */
PCR_VSX_DIS = 1ull << (63-1), /* VSX disable (bit NA since POWER8) */
PCR_TM_DIS = 1ull << (63-2), /* Trans. memory disable (POWER8) */