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| author | Benjamin Herrenschmidt <benh@kernel.crashing.org> | 2016-03-21 13:52:38 +0100 |
|---|---|---|
| committer | David Gibson <david@gibson.dropbear.id.au> | 2016-03-24 11:17:34 +1100 |
| commit | a6eabb9e5908ddf521ea372651b8321ffa804bd8 (patch) | |
| tree | 3c92947c5aaf7a97627d9798341bd1cfd34f7137 /target-ppc/cpu.h | |
| parent | 97eaf30ec68eab6efdedf32ad210581d074bcb03 (diff) | |
| download | qemu-a6eabb9e5908ddf521ea372651b8321ffa804bd8.tar.gz | |
ppc: Add POWER8 IAMR register
With appropriate AMR-like masks. Not actually used by the translation
logic at that point
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
[clg: changed spr_register_hv(SPR_IAMR) to spr_register_kvm_hv(SPR_IAMR)
changed gen_spr_amr() prototype ]
Signed-off-by: Cédric Le Goater <clg@fr.ibm.com>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Diffstat (limited to 'target-ppc/cpu.h')
| -rw-r--r-- | target-ppc/cpu.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h index 167c73f863..a3c4fb112a 100644 --- a/target-ppc/cpu.h +++ b/target-ppc/cpu.h @@ -1360,6 +1360,7 @@ static inline int cpu_mmu_index (CPUPPCState *env, bool ifetch) #define SPR_BOOKE_CSRR0 (0x03A) #define SPR_BOOKE_CSRR1 (0x03B) #define SPR_BOOKE_DEAR (0x03D) +#define SPR_IAMR (0x03D) #define SPR_BOOKE_ESR (0x03E) #define SPR_BOOKE_IVPR (0x03F) #define SPR_MPC_EIE (0x050) |