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authorAlexander Graf <agraf@suse.de>2013-01-04 11:21:04 +0100
committerAlexander Graf <agraf@suse.de>2013-01-07 17:37:11 +0100
commit68c2dd70068fe82a1989d0d5b70a1ab400bde19a (patch)
treee9be2de2931bf374beb4914b33f214d31dfec0c2 /target-ppc/cpu.h
parent1a61a9ae61cdf7b7d24c3eb711fe772c196c235e (diff)
downloadqemu-68c2dd70068fe82a1989d0d5b70a1ab400bde19a.tar.gz
PPC: Bring EPR support closer to reality
We already used to support the external proxy facility of FSL MPICs, but only implemented it halfway correctly. This patch adds support for * dynamic enablement of the EPR facility * interrupt acknowledgement only when the interrupt is delivered This way the implementation now is closer to real hardware. Signed-off-by: Alexander Graf <agraf@suse.de>
Diffstat (limited to 'target-ppc/cpu.h')
-rw-r--r--target-ppc/cpu.h4
1 files changed, 3 insertions, 1 deletions
diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h
index e88ebe00d4..dc5145bf39 100644
--- a/target-ppc/cpu.h
+++ b/target-ppc/cpu.h
@@ -1067,7 +1067,9 @@ struct CPUPPCState {
target_ulong ivor_mask;
target_ulong ivpr_mask;
target_ulong hreset_vector;
- hwaddr mpic_cpu_base;
+ hwaddr mpic_iack;
+ /* true when the external proxy facility mode is enabled */
+ bool mpic_proxy;
#endif
/* Those resources are used only during code translation */