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authorAurelien Jarno <aurelien@aurel32.net>2013-04-20 08:56:13 +0000
committerAlexander Graf <agraf@suse.de>2013-04-26 23:02:42 +0200
commitbf45a2e67cab8fcccb24e389bbd4ef68866a1cff (patch)
tree44908375dec15ab7b9ebadcef08e22993dee489b /target-ppc/fpu_helper.c
parent414f5d1448fef9aad6d37f1d40d1158396573447 (diff)
downloadqemu-bf45a2e67cab8fcccb24e389bbd4ef68866a1cff.tar.gz
target-ppc: optimize fabs, fnabs, fneg
fabs, fnabs and fneg are just flipping the bit sign of an FP register, this can be implemented in TCG instead of using softfloat. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Alexander Graf <agraf@suse.de>
Diffstat (limited to 'target-ppc/fpu_helper.c')
-rw-r--r--target-ppc/fpu_helper.c31
1 files changed, 0 insertions, 31 deletions
diff --git a/target-ppc/fpu_helper.c b/target-ppc/fpu_helper.c
index 1e141fb134..1f0eeab484 100644
--- a/target-ppc/fpu_helper.c
+++ b/target-ppc/fpu_helper.c
@@ -596,37 +596,6 @@ uint64_t helper_fdiv(CPUPPCState *env, uint64_t arg1, uint64_t arg2)
return farg1.ll;
}
-/* fabs */
-uint64_t helper_fabs(CPUPPCState *env, uint64_t arg)
-{
- CPU_DoubleU farg;
-
- farg.ll = arg;
- farg.d = float64_abs(farg.d);
- return farg.ll;
-}
-
-/* fnabs */
-uint64_t helper_fnabs(CPUPPCState *env, uint64_t arg)
-{
- CPU_DoubleU farg;
-
- farg.ll = arg;
- farg.d = float64_abs(farg.d);
- farg.d = float64_chs(farg.d);
- return farg.ll;
-}
-
-/* fneg */
-uint64_t helper_fneg(CPUPPCState *env, uint64_t arg)
-{
- CPU_DoubleU farg;
-
- farg.ll = arg;
- farg.d = float64_chs(farg.d);
- return farg.ll;
-}
-
/* fctiw - fctiw. */
uint64_t helper_fctiw(CPUPPCState *env, uint64_t arg)
{