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authorTom Musta <tommusta@gmail.com>2014-02-12 15:23:09 -0600
committerAlexander Graf <agraf@suse.de>2014-03-05 03:06:57 +0100
commit818692ff95f143e640b44726da59646ea7fbcc23 (patch)
treed1971688d92e3f43ef218a31b519b85a6cd550cf /target-ppc/helper.h
parente0ffe77f275e62a57eceda4c7fbb26e499e9ed86 (diff)
downloadqemu-818692ff95f143e640b44726da59646ea7fbcc23.tar.gz
target-ppc: Altivec 2.07: Change Bit Masks to Support 64-bit Rotates and Shifts
Existing code in the VROTATE, VSL and VSR macros for the Altivec rotate and shift helpers uses a formula to compute a bit mask used to extract the rotate/shift amount from the VRB register. What is desired is: mask = (1 << (3 + log2(sizeof(element)))) - 1 but what is implemented is: mask = (1 << (3 + (sizeof(element)/2))) - 1 This produces correct answers when "element" is uint8_t, uint16_t or uint_32t. But it breaks down when element is uint64_t. This patch corrects the situation. Since the mask is known at compile time, the macros are changed to simply accept the mask as an argument. Subsequent patches in this series will add double-word variants of rotates and shifts and thus take advantage of this fix. Signed-off-by: Tom Musta <tommusta@gmail.com> Signed-off-by: Alexander Graf <agraf@suse.de>
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