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| author | David Gibson <david@gibson.dropbear.id.au> | 2013-03-12 00:31:14 +0000 |
|---|---|---|
| committer | Alexander Graf <agraf@suse.de> | 2013-03-22 15:28:48 +0100 |
| commit | 496272a7018ba01aa2b87a1a5ed866ff85133401 (patch) | |
| tree | 07a2318d117f57e1f817eeeb6f1657385bab6963 /target-ppc/mmu_helper.c | |
| parent | f2ad6be83bc284d6c7677bdca879db38d4fdccd5 (diff) | |
| download | qemu-496272a7018ba01aa2b87a1a5ed866ff85133401.tar.gz | |
target-ppc: Disentangle hash mmu helper functions
The newly separated paths for hash mmus rely on several helper functions
which are still shared with 32-bit hash mmus: pp_check(), check_prot() and
pte_update_flags(). While these don't have ugly ifdefs on the mmu type,
they're not very well thought out, so sharing them impedes cleaning up the
hash mmu paths. For now, put near-duplicate versions into mmu-hash64.c and
mmu-hash32.c, leaving the old version in mmu_helper.c for 6xx software
loaded tlb implementations. The hash 32 and software loaded
implementations are simplfied slightly, using the fact that no 32-bit CPUs
implement the 3rd page protection bit.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Alexander Graf <agraf@suse.de>
Diffstat (limited to 'target-ppc/mmu_helper.c')
| -rw-r--r-- | target-ppc/mmu_helper.c | 11 |
1 files changed, 4 insertions, 7 deletions
diff --git a/target-ppc/mmu_helper.c b/target-ppc/mmu_helper.c index 818f1b595f..2deb635d75 100644 --- a/target-ppc/mmu_helper.c +++ b/target-ppc/mmu_helper.c @@ -91,12 +91,11 @@ static inline void pte_invalidate(target_ulong *pte0) #define PTE_PTEM_MASK 0x7FFFFFBF #define PTE_CHECK_MASK (TARGET_PAGE_MASK | 0x7B) -int pp_check(int key, int pp, int nx) +static int pp_check(int key, int pp, int nx) { int access; /* Compute access rights */ - /* When pp is 3/7, the result is undefined. Set it to noaccess */ access = 0; if (key == 0) { switch (pp) { @@ -106,14 +105,12 @@ int pp_check(int key, int pp, int nx) access |= PAGE_WRITE; /* No break here */ case 0x3: - case 0x6: access |= PAGE_READ; break; } } else { switch (pp) { case 0x0: - case 0x6: access = 0; break; case 0x1: @@ -132,7 +129,7 @@ int pp_check(int key, int pp, int nx) return access; } -int check_prot(int prot, int rw, int access_type) +static int check_prot(int prot, int rw, int access_type) { int ret; @@ -201,8 +198,8 @@ static inline int ppc6xx_tlb_pte_check(mmu_ctx_t *ctx, target_ulong pte0, return ret; } -int pte_update_flags(mmu_ctx_t *ctx, target_ulong *pte1p, - int ret, int rw) +static int pte_update_flags(mmu_ctx_t *ctx, target_ulong *pte1p, + int ret, int rw) { int store = 0; |