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authorAlexander Graf <agraf@suse.de>2011-06-17 01:00:28 +0200
committerAlexander Graf <agraf@suse.de>2011-06-17 02:58:37 +0200
commit1c53accceeb01246aea0ec361e1efd15cac6db0f (patch)
tree19d6bae7c21f0d852d5a1af0ad63b61a3d84fabf /target-ppc/op_helper.c
parent0dd4bc7dd45de7afa88662d24bd50a3aafdbab64 (diff)
downloadqemu-1c53accceeb01246aea0ec361e1efd15cac6db0f.tar.gz
PPC: move TLBs to their own arrays
Until now, we've created a union over multiple different TLB types and allocated that union. While it's a waste of memory (and cache) to allocate TLB information for a TLB type with much information when you only need little, it also inflicts another issue. With the new KVM API, we can now share the TLB between KVM and qemu, but for that to work we need to have both be in the same layout. We can't just stretch it over to fit some internal different TLB representation. Hence this patch moves all TLB types to their own array, allowing us to only address and allocate exactly the boundaries required for the specific TLB type at hand. Signed-off-by: Alexander Graf <agraf@suse.de>
Diffstat (limited to 'target-ppc/op_helper.c')
-rw-r--r--target-ppc/op_helper.c12
1 files changed, 6 insertions, 6 deletions
diff --git a/target-ppc/op_helper.c b/target-ppc/op_helper.c
index 135211dee6..82b6651925 100644
--- a/target-ppc/op_helper.c
+++ b/target-ppc/op_helper.c
@@ -3959,7 +3959,7 @@ target_ulong helper_4xx_tlbre_hi (target_ulong entry)
int size;
entry &= PPC4XX_TLB_ENTRY_MASK;
- tlb = &env->tlb[entry].tlbe;
+ tlb = &env->tlb.tlbe[entry];
ret = tlb->EPN;
if (tlb->prot & PAGE_VALID) {
ret |= PPC4XX_TLBHI_V;
@@ -3979,7 +3979,7 @@ target_ulong helper_4xx_tlbre_lo (target_ulong entry)
target_ulong ret;
entry &= PPC4XX_TLB_ENTRY_MASK;
- tlb = &env->tlb[entry].tlbe;
+ tlb = &env->tlb.tlbe[entry];
ret = tlb->RPN;
if (tlb->prot & PAGE_EXEC) {
ret |= PPC4XX_TLBLO_EX;
@@ -3998,7 +3998,7 @@ void helper_4xx_tlbwe_hi (target_ulong entry, target_ulong val)
LOG_SWTLB("%s entry %d val " TARGET_FMT_lx "\n", __func__, (int)entry,
val);
entry &= PPC4XX_TLB_ENTRY_MASK;
- tlb = &env->tlb[entry].tlbe;
+ tlb = &env->tlb.tlbe[entry];
/* Invalidate previous TLB (if it's valid) */
if (tlb->prot & PAGE_VALID) {
end = tlb->EPN + tlb->size;
@@ -4056,7 +4056,7 @@ void helper_4xx_tlbwe_lo (target_ulong entry, target_ulong val)
LOG_SWTLB("%s entry %i val " TARGET_FMT_lx "\n", __func__, (int)entry,
val);
entry &= PPC4XX_TLB_ENTRY_MASK;
- tlb = &env->tlb[entry].tlbe;
+ tlb = &env->tlb.tlbe[entry];
tlb->attr = val & PPC4XX_TLBLO_ATTR_MASK;
tlb->RPN = val & PPC4XX_TLBLO_RPN_MASK;
tlb->prot = PAGE_READ;
@@ -4091,7 +4091,7 @@ void helper_440_tlbwe (uint32_t word, target_ulong entry, target_ulong value)
__func__, word, (int)entry, value);
do_flush_tlbs = 0;
entry &= 0x3F;
- tlb = &env->tlb[entry].tlbe;
+ tlb = &env->tlb.tlbe[entry];
switch (word) {
default:
/* Just here to please gcc */
@@ -4150,7 +4150,7 @@ target_ulong helper_440_tlbre (uint32_t word, target_ulong entry)
int size;
entry &= 0x3F;
- tlb = &env->tlb[entry].tlbe;
+ tlb = &env->tlb.tlbe[entry];
switch (word) {
default:
/* Just here to please gcc */